Faulty C40 Driver locked out Dflash, clearing SPELOCK fails

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Faulty C40 Driver locked out Dflash, clearing SPELOCK fails

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oliver777777
Contributor II

The C40 Driver faults on Dflash when trying to unlock sector 11 in Dflash on the S32K344 T Box. When using a gdb debugger, I try to manually unlock the SPELOCK on the 11th bit and it fails. I've tried disabling the DMEEE in the PFLASH_PFCR4. The first 0-10 sectors successfully unlock and can be programmed and erased. I suspect a CRC error because of a prior faulty C40 erase/program or it being reset early.

 

Is there a way to do a full erase (similar to the Kinetis board mass erase option in S32DS) to reset the dflash of the board? 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @oliver777777,

What DFlash address you want to program?

Can you specify the RTD version you use?

 

Thank you,

BR, Daniel

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oliver777777
Contributor II
Trying to unlock address 0x10016000 to erase sector 11. It hardfaults when attempting to clearlock (C40_Ip_ClearLock). This is for the RTD AUTOSAR 4.7
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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @oliver777777,

You did not specify the RTD version.

For example, I tested it with this revision and it works.

S32K3_RTD_4_0_0_P24_D2405_ASR_REL_4_7

danielmartynek_0-1727961871937.png

There might be a bug in the revision you use, but I need to know the revision to be able to confirm that.

 

Regards,

Daniel

 

 

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oliver777777
Contributor II
An additional note: in our tests, we have tried to unlock sectors 0-16 in a for loop and it hard faults on 11. We have also tried to unlock only sector 11 in isolation and that also induces a hardfult.
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danielmartynek
NXP TechSupport
NXP TechSupport

Hi @oliver777777,

If this is a sporadic failure, it is probably not the driver itself.

Also, the lock has nothing to do with the content of the sector.

It could be because incorrect clock configuration, for example.

Is the system clock set precisely to one of the clock options listed in the RM?

e.g. Table 151. Option A - High Performance mode (CORE_CLK @ 160 MHz).

Is the compiler configures as per the RTD release notes?

Is the XRDC configured in the project?

If you see a fault exception there, can you share more information about the fault.

 

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447

https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-...

https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-...

 

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oliver777777
Contributor II

For faulting syndromes, we checked the FCCU and ERM registers as well and this is what we found:
- NCFS2 and NCFS0 of the FCCU set immediately on boot, yet this was also the case for a working board.
- Channel 11 (Cortex-M7_0 D0TCM) and 12 (Cortex-M7_0 D1TCM) of the ERM was reporting a non-correctable ECC error event at the time of the hardfault

- all SETSLOCK registers were zero on boot and at time of hard fault
- we were able to eliminate the ERM errors by setting the PFLASH_PFCR4_DMEEE_MASK in the config register
- we were are able to clear the super sector locks, but this did not have an effect

This ECC error lead us to believe that there was a corrupted flash program, but we also confirmed that the fault occurs on the unlock_sector call which is separate which is strange. Are there any other relevant fault registers we should check? 

ERM failures (1).png

 

I've traced through the CLK in our drivers and it's being configured correctly. I will double check and investigate the compiler options as well as XRDC. 

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello @oliver777777,

This is all rather strange.

Please provide more information about the fault exception.

I linked some threads above for your reference.

You should be able to indentify the fault type etc. Have a look at the stack from the fault handler, the core stacks the PC value that points to the instruction that was interrupted.

Also, can you confirm that the clock configuration is inline with the RM?

 

Thank you

 

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oliver777777
Contributor II
The RTD version is: S32K3_RTD_3_0_0_D2303_ASR_REL_4_7_REV_0000_20230331.

To add some context, we have several boards that are running the same binaries without losing control to specific sectors in flash and 2 other boards that have run the same binary and hardfault because it can't unlock certain sectors (in our case sector 11). On those hard faulting boards, we can unlock sector 1-10 fine.
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