Hi,
I used this code. But I am using S32K116 and after the following code is run, system is generating error. What is the problem here? What can i do to solve this?
/* ERM_SR */
ERM->SR0 |= ERM_SR0_SBC0(1U) | /* w1c SRAM_L Single-Bit Correction flag */
ERM_SR0_NCE0(1U); /* w1c SRAM_L Non-Correctable Error flag */
/* ERM_CR */
ERM->CR0 |= ERM_CR0_ESCIE0(1U) | /* Enable SRAM_L Single Correction Interrupt Notification */
ERM_CR0_ENCIE0(1U); /* Enable SRAM_L Non-Correctable Interrupt Notification */
/* Write the EICHDn_WORD registers before executing the two-stage-enable mechanism */
/* A write to any of this field clears the corresponding EICHEN[EICHnEN] enable bits */
/* SRAM_L */
EIM->EICHDn[0].WORD0 = 0x00000000; /* CHKBIT[31-25] remain unmodified */
EIM->EICHDn[0].WORD1 = 0x00000003; /* B0_3DATA_MASK[0-1] bits of the read data bus are inverted */
/* enable interrupts at core level */
Nvic::setPriority(ERM_fault_IRQn, system::ERM_IRQ_PRIO);
Nvic::enableInterrupt(ERM_fault_IRQn);
EIM->EICHEN |= EIM_EICHEN_EICH0EN(1U); /* Error Injection Channel 0 Enable (SRAM_L)*/
EIM->EIMCR |= EIM_EIMCR_GEIEN(1U); /* Global Error Injection Enable */
(void)EIM->EIMCR; /* Read-after_write */