I am working on SPI on the S32k3x Q172 Board the data is getting disturbed due to Clock/Enable line disturbances I have connected the SPI lines to the logic analyser i have observed a pattern that the clock pulse and enable line is disturbing and then data is getting corrupted ,could any one give me a solution to configure the SPI Master on S32k344 .
Sometimes I am getting the correct data but most of the time i am getting the error or incorrect data i am sending 0x1,0x2,0x3,0x4,0x5,0x6,0x7 and most of the time i am getting corrupted data i am attaching the images
The example we tested was the "Lpspi_Ip_Transfer_S32K344.zip" project attached in the link previously shared.
Example S32K344 SPI Transmit & Receive Using DMA DS3.5 RTD500 - NXP Community
Regarding the Logic Analyzer, we used the default configuration:
Hope it helps you.
BR,
IsaulO.
In this same post I am responding to the case Incorrect data on SPI S32k3x q172 EVB - NXP Community.
From the images shared above we observe that the message coming from the Slave changes between images, we suggest you check the configuration of your Slave and Analyzer.
We have tested data transmission from the master (S32K344) and observed consistent behavior. See the image below:
Also, we recommend working with the latest software versions. For better reference, you can check the following example on how to work with LPSPI with low-level drivers and high-level drivers.
Example S32K344 SPI Transmit & Receive Using DMA DS3.5 RTD500 - NXP Community
Hope it helps you.
BR,
IsaulO.
