Hi@elb1
Q1.Yes and you can refer to the demo below.
Q2.hard to explain to you, you need to read the S32K-RM for detail:
chapter :7.2 Nested Vectored Interrupt Controller (NVIC) Configuration
#include "device_registers.h"
/*! Port PTC12, bit 12: FRDM EVB input from BTN0 [SW2]*/
#define PTC12 12
int counter = 0;
void WDOG_disable (void)
{
WDOG->CNT=0xD928C520; /* Unlock watchdog */
WDOG->TOVAL=0x0000FFFF; /* Maximum timeout value */
WDOG->CS = 0x00002100; /* Disable watchdog */
}
void S32_NVIC_EnableIRQ(IRQn_Type IRQn, int Priority)
{
/* enable interrupt */
S32_NVIC->ISER[(uint32_t)((int32_t)IRQn) >> 5] = (uint32_t)(1 << ((uint32_t)((int32_t)IRQn) & (uint32_t)0x1F));
S32_NVIC->IP[IRQn] = Priority;
}
void PORTC_IRQHandler(void)
{
counter++;
PORTC->PCR[PTC12] |= PORT_PCR_ISF_MASK;
}
int main(void)
{
/* Disable Watchdog in case it is not done in startup code */
WDOG_disable();
/* Enable clocks to peripherals (PORT modules) *//* Enable clock to PORT D*/
PCC-> PCCn[PCC_PORTC_INDEX] = PCC_PCCn_CGC_MASK;
/* Configure port C12 as GPIO input (BTN 0 [SW2] on EVB) */
PTC->PDDR &= ~(1<<PTC12);
PORTC->PCR[12] = PORT_PCR_MUX(1)|PORT_PCR_PFE_MASK|PORT_PCR_IRQC(0x9); /* Port C12: MUX = GPIO, input filter enabled */
S32_NVIC_EnableIRQ(PORTC_IRQn,9);
for(;;)
{
;
}
}