Hello
We are using custom board S32k148-100 pin for our development activities.
We have a communication requirement to communicate with SPI master(on another chip- exeynos) with SPI slave on S32k148.
We notice that, master is always setting CS(chip select) Pin as high due to which, we are unable to receive any changes on the SPI slave i.e the DMA configured on SPI slave has not triggering DMA complete call back. While on the SPI master (from exeynos) we could see Master clock with 500kbps and data on MOSI line too.
Could you please share the application and changes in the driver required so that LPSPI slave communicates with SPI Master with SPI Slave 3 pins(MOSI, MISO and Clock).
Regards,
Jayakumar Appari
Thanks Daniel.
Hi Jayakumar,
The LPSPI module can work as a Slave without PCS if the CFGR1[AUTOPCS] is set.
It has some restrictions as you can see in this description:
BR, Daniel
Hi Daniel
Thanks for sharing the insights.
Would like to understand, how the below configuration can be synchronized w.r.t master data.
Kindky share your inputs.
Best Regards,
Jayakumar Appari
Hi Jayakumar
You need to configure the master to have the required delay, at least 4 cycles of the prescaled functional clock
Regards,
Daniel