I am trying to implement the CRC-32/BZIP2 using the HW crc. My reference is this site.
I am able to compute the ieee_CRC32 with following parameters:
CRC->CTRL = 1<<31 | // Type Of Transpose For Writes: Bits in bytes are transposed; bytes are not transposed
1<<29 | // Type Of Transpose For Read: 10b - Both bits in bytes and bytes are transposed
1<<26 | // Complement Read Of CRC Data Register;
1<<25 | // CRC Data Register as seed
1<<24 ; // TCRC32 bit
CRC->DATAu.DATA = 0xffffffff;
CRC->CTRL &= ~(uint32_t)(1<<25); // CRC Data Register as data
CRC->GPOLY = 0x04C11DB7;
input -> 2000f000, expected output -> 0xAFEE8C04, correct.
I am not able to replicate any of the other combinations, for example the second line.
Is there any detailed guide or some reference where I can look in detail how to configure the HW Crc peripheral on the S23K? Or in general a guide to understand how to map common poly/algos into hw crc?
Thanks and best regards,
it's just necessary to find the right combination of TOT, TOTR and FXOR bit fields.
For CRC-32, use:
TOT = 0b01, TOTR = 0b10, FXOR = 0b1
TOT = 0b10, TOTR = 0b10, FXOR = 0b1
For CRC-32/BZIP2, use:
TOT = 0b00, TOTR = 0b00, FXOR = 0b1
TOT = 0b11, TOTR = 0b00, FXOR = 0b1
Frankly, I didn't have time to study the differences between individual algorithms, so I used brutal force method which was faster - I wrote simple code which tries all the combinations and then I compared the results...
Hope it helps anyway...