CAN communication

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CAN communication

572 Views
AnilKumar409
Contributor III

Hi,

I'm intend to build CAN communication, but I was not able to receive the data. I'm attaching the code here, please have a look and suggest me.

/*
* main implementation: use this 'C' sample to create your own application
*
*/
#include "S32K144.h"
//#include "FlexCAN.h"
#define PTD16 16
#if defined (__ghs__)
#define __INTERRUPT_SVC __interrupt
#define __NO_RETURN _Pragma("ghs nowarning 111")
#elif defined (__ICCARM__)
#define __INTERRUPT_SVC __svc
#define __NO_RETURN _Pragma("diag_suppress=Pe111")
#elif defined (__GNUC__)
#define __INTERRUPT_SVC __attribute__ ((interrupt ("SVC")))
#define __NO_RETURN
#else
#define __INTERRUPT_SVC
#define __NO_RETURN
#endif

int counter, accumulator = 0, limit_value = 1000000;
void SOSC_init_8MHz(void){
SCG->SOSCDIV = 0x00000101;
SCG->SOSCCFG = 0x00000024;
while(SCG->SOSCCSR & SCG_SOSCCSR_LK_MASK);
SCG->SOSCCSR = 0x00000001;
while (!(SCG->SOSCCSR &SCG_SOSCCSR_SOSCVLD_MASK));
}
void SPLL_init_80MHz(void){
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK);
SCG->SPLLCSR = 0x00000000;
SCG->SPLLDIV = 0x00000302;
SCG->SPLLCFG = 0x00180000;
while(SCG->SPLLCSR & SCG_SPLLCSR_LK_MASK);
SCG->SPLLCSR = 0x00000001;
while(!(SCG->SPLLCSR & SCG_SPLLCSR_SPLLVLD_MASK));
}
void NormalRunMode_80MHz(void){
SCG->RCCR = SCG_RCCR_SCS(6) | SCG_RCCR_DIVCORE(0b01) | SCG_RCCR_DIVBUS(0b01) | SCG_RCCR_DIVSLOW(0b10);
while (((SCG->CSR & SCG_CSR_SCS_MASK) >> SCG_CSR_SCS_SHIFT) != 6);
}
void CAN0_init(void){
#define MSG_BUF_SIZE 4
uint32_t i = 0;
PCC->PCCn[PCC_FlexCAN0_INDEX] |= PCC_PCCn_CGC_MASK;
CAN0->MCR |= CAN_MCR_MDIS_MASK;
CAN0->CTRL1 &= ~(CAN_CTRL1_CLKSRC_MASK);
CAN0->MCR &= ~CAN_MCR_MDIS_MASK;
while(!((CAN0->MCR & CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT));
CAN0->CTRL1 = 0x00DB0006;
for(i=0;i<128;i++){
CAN0->RAMn[i] = 0;
}
for(i=0;i<16;i++){
CAN0->RXIMR[i]=0xFFFFFFFF;
}
CAN0->RXMGMASK = 0x1FFFFFFF;
CAN0->RAMn[4*MSG_BUF_SIZE + 0] = 0x04000000;
CAN0->RAMn[4*MSG_BUF_SIZE + 1] = 0x15540000;
//#ifdef NODE_A
// CAN0->RAMn[4*MSG_BUF_SIZE + 1] = 0x14440000;
//#else
// CAN0->RAMn[4*MSG_BUF_SIZE + 1] = 0x15540000;
//#endif
CAN0->MCR = 0x0000001F;
while((CAN0->MCR && CAN_MCR_FRZACK_MASK) >> CAN_MCR_FRZACK_SHIFT);
while((CAN0->MCR && CAN_MCR_NOTRDY_MASK) >> CAN_MCR_NOTRDY_SHIFT);
}
void PORT_init(void){
PCC->PCCn[PCC_PORTE_INDEX] |= PCC_PCCn_CGC_MASK;
PORTE->PCR[4] |= PORT_PCR_MUX(5);
PORTE->PCR[5] |= PORT_PCR_MUX(5);
PCC->PCCn[PCC_PORTD_INDEX] |= PCC_PCCn_CGC_MASK;
PORTD->PCR[16] = 0x00000100;
PTD->PDDR |= 1<<PTD16;
}


int main(void) {
int counter = 0;
uint32_t rx_msg_cnt= 0;
SOSC_init_8MHz();
SPLL_init_80MHz();
NormalRunMode_80MHz();
CAN0_init();
PORT_init();
#ifdef NODE_A
CAN0_tx_msg();
#endif
for (;;) {
counter++;
if((CAN0->IFLAG1 >> 4) & 1)
{
CAN0_rx_msg();
rx_msg_cnt++;
if(rx_msg_cnt == 1000)
{
PTD->PTOR |= 1<<PTD16;
rx_msg_cnt = 0;
}
CAN0_tx_msg();

}
}
/* to avoid the warning message for GHS and IAR: statement is unreachable*/
__NO_RETURN
return 0;
}
void CAN0_tx_msg(void){
CAN0->IFLAG1 = 0x00000001;
CAN0->RAMn[0*MSG_BUF_SIZE + 2] = 0xA5112233;
CAN0->RAMn[0*MSG_BUF_SIZE + 3] = 0x44556677;
CAN0->RAMn[0*MSG_BUF_SIZE + 1] = 0x14440000;
CAN0->RAMn[0*MSG_BUF_SIZE + 0] = 0x0C400000 | 8<< CAN_WMBn_CS_DLC_SHIFT;
//#ifdef NODE_A
// CAN0->RAMn[0*MSG_BUF_SIZE + 1] = 0x15540000;
//#else
// CAN0->RAMn[0*MSG_BUF_SIZE + 1] = 0X14440000;
//#endif
// CAN0->RAMn[0*MSG_BUF_SIZE + 1] = 0x0C400000 | 8<< CAN_WMBn_CS_DLC_SHIFT;
}
void CAN0_rx_msg(void){
uint8_t j;
uint32_t RxCODE;
uint32_t RxID;
uint32_t RxLENGTH;
uint32_t RxDATA[2];
uint32_t RxTIMESTAMP;
RxCODE = (CAN0->RAMn[4*MSG_BUF_SIZE + 0] & 0x070000) >> 24;
RxID = (CAN0->RAMn[4*MSG_BUF_SIZE + 1] & CAN_WMBn_ID_ID_MASK) >> CAN_WMBn_ID_ID_SHIFT;
RxLENGTH = (CAN0->RAMn[4*MSG_BUF_SIZE + 0] & CAN_WMBn_CS_DLC_MASK) >> CAN_WMBn_CS_DLC_SHIFT;
for (j=0;j<2;j++){
RxDATA[j] = CAN0->RAMn[4*MSG_BUF_SIZE + 2 + j];
}
RxTIMESTAMP = (CAN0->RAMn[0*MSG_BUF_SIZE + 0] & 0X000FFFFF);
(void)CAN0->TIMER;
CAN0->IFLAG1 = 0x00000010;
}

__INTERRUPT_SVC void SVC_Handler() {
accumulator += counter;
}

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560 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

code looks normal. It configures CAN0 to receive std ID 0x555 into MB4 and send std ID 0x511 using MB0. So if pins (PTE4/PTE5 used here) are properly connected to active transceiver and other node with same bitrate is connected to the bus, then the communication should be OK.
If you have S32K144 EVB, be sure it is powered by 12V supply and SBC transceiver is active.
Read FlexCAN's ESR1/ECR register to know if any error is detected.

BR, Petr

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