BusFault When a function allocated in ITCM of core0

[AbdNxp]

Hello Dear NXP Support,

Issue with ITCM Usage Causing BusFault on Wake-up – S32K322 

Platform Information

• MCU: S32K322

• Project Type: RTD AUTOSAR 4.7

• Core: Cortex-M (Core0 only)

• Peripheral: ADC_SAR

• AUTOSAR Version: 4.7.0

• AUTOSAR Revision: ASR_REL_4_7_REV_0000

• RTD SW Version: 3.0.0

• Build Version:
  S32K3_RTD_3_0_0_P01_HF02_D2305_ASR_REL_4_7_REV_0000_20230331

• RTOS: FreeRTOS Kernel v10.5.1

Note: The application is using only Core0.

=========================================================

I have tried two different approaches to use ITCM, both of which result in a BusFault during wake-up from sleep mode.

1) FreeRTOS Heap Allocated in ITCM

• The FreeRTOS heap was placed in the ITCM section.

• The application runs normally during active mode.

• When the MCU enters sleep and wakes up, a BusFault is triggered immediately.

2) Wake-up Callback Function Placed in ITCM

• I attempted to place the wake-up callback function in ITCM.

• Initially, this resulted in a section overlap error:

  • .ARM.exidx overlapping with .dtcm0_data

• To resolve this, I modified the linker script by placing the .ARM.exidx section immediately after the PFLASH region.

• After this change:

  • The application builds successfully.

  • The application runs correctly until the MCU enters sleep.

  • On wake-up, the application again encounters a BusFault.

Request for Guidance

I would appreciate your support on the following points:

1. What is the recommended and supported way to use ITCM on S32K322?

2. Are there any restrictions or special considerations for placing:

   • FreeRTOS heap

   • Interrupt or wake-up related functions
     in ITCM when using low-power modes?

3. Is additional initialization or retention handling required for ITCM across sleep/wake-up transitions?

4. Are there any known issues or limitations with ITCM usage in this RTD / FreeRTOS combination?

For your reference, I have attached the linker script and startup.s files used in this setup.

Thank you for your time and support. I look forward to your guidance.

[AbdNxp]

Hello Dear Danial,

I would give few of details you needed:-

Q1) Is it a BusFault, UsageFault, or MemManage fault? 

A1) It's BusFault

Q2) Check whether BFAR/MMFAR are valid (via the BFARVALID/MMARVALID bits) and report the fault address if available.

A2) Sorry I could not get it, but my stack pointer points within valid ram address.

Q3) Can you determine the PC (program counter) of the faulting instruction from the stacked frame?

A3) Its not always same, but its valid address.

In my case, after wakeup, the MCU does not proceeds through a functional reset.

I am using CORE_STANDBY with exit on sleep

MY application uses the DTCM of CM1 via backdoor.

Here are 2 observation I have:-

1) When debugger is connected  If I initialize ECC for ITCM0 just after wakeup and reload the itcm rom content to itcm ram , application wakeup and either runs few second and crash or gets exception immediately after wakeup.

2) When debugger is NOT connected, if I initialize ECC for ITCM0 just after wakeup and reload the itcm rom content to itcm ram, the application DOES NOT crash, and runs for hours,  even my sleep logic works as expected.

what is your thought on this ?  

I am using SWD via J-trace pro.

[danielmartynek]

Hi @AbdNxp,

In core standby (WFI), the core is asleep but the RUN domain stays up. TCM contents do not get destroyed just because you executed WFI. In other words, you should not need to re‑initialize ITCM/DTCM ECC or reload ITCM on every WFI wake. ECC initialization is required on destructive reset / POR before the first read of volatile memories, not on simple core sleep/wake. And this is done in the startup code. After core wakeup, the execution continues with the ISR (+ pending ISRs) and with the instruction after (WFI). Re‑initializing ECC every wake from core standby can itself create faults if any code/ISRs still fetch from ITCM while you’re re‑seeding ECC.

Regards,

Daniel

[AbdNxp]

Hello Danial,

Thanks for clarifying about initialization of ECC and itcm content.

I am using WFE not WFI, does it makes any difference ?

1) Now the question I have is, with very small modification in my code where I just even place a single function or freeRTOS ucHeap  in ITCM0, my application crashes just after wakeup when debugger is connected. but when I remove the debugger then the application runs smooth.

[danielmartynek]

Hi @AbdNxp,

1. No, but since you are already using RTD, why not leverage the provided MCU or Power_Ip APIs for this functionality? They are designed to handle these transitions.
2. Could you prepare a minimal, reproducible version of your project that demonstrates the failure? You can share it here or, if preferred, submit it privately through a support ticket so that I can analyze and debug it?

BR, Daniel

[danielmartynek]

Hello @AbdNxp,

Please provide more detailed information about the fault exception.
Is it a BusFault, UsageFault, or MemManage fault?
Check whether BFAR/MMFAR are valid (via the BFARVALID/MMARVALID bits) and report the fault address if available.
Can you determine the PC (program counter) of the faulting instruction from the stacked frame?
For reference, refer to the following documents:

https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K312-HARDFAULT-Handling-Interrupt-DS3-5-...

https://community.nxp.com/t5/S32K-Knowledge-Base/How-To-Debug-A-Fault-Exception-On-ARM-Cortex-M-V7M-...

https://community.nxp.com/t5/S32K-Knowledge-Base/Fault-handling-on-S32K14x/ta-p/1114447

After wakeup, the MCU proceeds through a functional reset.
I don’t see any obvious reason for the fault exception unless Fast Wakeup is being used.
Since the S32K322 has two application cores, what is the state of CM7_1 before and after the standby?

Thank you,

BR, Daniel