Basics of Bus Fault in S32DS Program

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Basics of Bus Fault in S32DS Program

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abdul_rahman
Contributor III

Hi team,

I was trying to run a simple complementary program on a S32K358 microcontroller using the S32DS IDE. But i'm facing an error called as bus fault in the program. I have attached the highlighted screenshot of the error message below.

abdul_rahman_0-1722441809041.png

I ran the same program in an S32K344 evaluation board and there I didn't face such an error. Please explain me this fault and also the solution to this as I'm new to this IDE's programming. It would be really helpful.

S32DS-S32PLATFORM #S32K358 #BusFault 

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abdul_rahman
Contributor III

Hi @VaneB 

You were right about the failure in the Clock_Ip_init() function. The problem was not with the hardware. The problem was in specifying the right clock frequency in the FXOSC section in the clock configuration tool (which makes the Clock_Ip_init() function). My custom hardware was using 40 MHz oscillator and I was running the code in 16 MHz FXOSC in the clock configuration tool of my program. Once I changed that to 40 MHz and uploaded the code again, the busfault error was gone and the code was running. 

Thanks for all the help you have given me sir. I deeply appreciate it.

 

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abdul_rahman
Contributor III

Hi @VaneB 

In a new custom project file, I'm now experiencing this type of bus and hard fault with the message highlighted as shown,abdul_rahman_0-1724065238400.png,

I haven't connected any peripherals or devices to the custom microcontroller. Do you think that the fault is due to the SPI data not being transmitted/received to the controller? Or is it something else?

 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

Could you share a picture of the Debug tab displayed on the left side of the S32DS during debugging? This tab shows where the code failed.

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abdul_rahman
Contributor III

Dear @VaneB,

Here is the screenshot of the right side of debug window you requested.

abdul_rahman_0-1724170560482.png

What could be the problem?

 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

It seems that your code fails in the Lpspi_Ip_UpdateTransferMode() function. How do you call this function? Also, could you share the SPI configurations?

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abdul_rahman
Contributor III

Hi @VaneB 

This is the Lpspi_Ip_UpdateTransferMode() function in my code

Lpspi_Ip_StatusType Lpspi_Ip_UpdateTransferMode(uint8 Instance, Lpspi_Ip_ModeType Mode)
{
Lpspi_Ip_StateStructureType* State;
Lpspi_Ip_StatusType Status = LPSPI_IP_STATUS_SUCCESS;
#if (LPSPI_IP_DMA_USED == STD_ON)
Dma_Ip_LogicChannelTransferListType DmaTcdList[1u];
#endif

#if (LPSPI_IP_DEV_ERROR_DETECT == STD_ON)
DevAssert(Instance < LPSPI_INSTANCE_COUNT);
#endif
State = Lpspi_Ip_apxStateStructureArray[Instance];
#if (LPSPI_IP_DEV_ERROR_DETECT == STD_ON)
DevAssert(NULL_PTR != State);
#endif
/* Transfer mode can be changed when no transfers are in progress. */
if (State->Status != LPSPI_IP_BUSY)
{
State->TransferMode = Mode;
#if (LPSPI_IP_DMA_USED == STD_ON)
if (TRUE == State->PhyUnitConfig->DmaUsed)
{
/* Activate TX DMA and RX DMA interrupt in interrupt mode or disable then in polling mode. */
DmaTcdList[0u].Param = DMA_IP_CH_SET_CONTROL_EN_MAJOR_INTERRUPT;
switch (State->TransferMode)
{
case LPSPI_IP_POLLING:
/* Disable DMA major interrupt. */
DmaTcdList[0u].Value = 0u;
break;
case LPSPI_IP_INTERRUPT:
/* Enable DMA major interrupt. */
DmaTcdList[0u].Value = 1u;
break;
default:
/* Nothing to do */
break;
}
(void)Dma_Ip_SetLogicChannelTransferList(State->PhyUnitConfig->TxDmaChannel, DmaTcdList, 1u);
(void)Dma_Ip_SetLogicChannelTransferList(State->PhyUnitConfig->RxDmaChannel, DmaTcdList, 1u);
}
#endif
}
else
{
Status = LPSPI_IP_STATUS_FAIL;
}
return Status;
}

The below mentioned are the SPI configurations,

SpiDriver

abdul_rahman_0-1724334979490.png

 abdul_rahman_1-1724335016159.png

SpiGeneral

abdul_rahman_2-1724335069352.png

 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

I sent you a private message

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abdul_rahman
Contributor III

Hi @VaneB 

I ran the Emios_PWM_Ip example code, that comes with the SDK, on my custom board with the S32K358 controller. I'm still getting the same HardFault error mentioned before. What could be the problem then?

abdul_rahman_0-1723023668800.png

 

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

BusFault: detects memory access errors on instruction fetch, data read/write, interrupt vector fetch, and register stacking (save/restore) on interrupt (entry/exit).

HardFault: is the default exception and can be triggered because of an error during exception
processing, or because an exception cannot be managed by any other exception mechanism.

If there is no handler for a specific fault, it is escalated to HardFault.

As the code works with a S32K344, there could be a configuration problem. If it is possible could you share your project or configurations? Also, which RTD version are you using? 

 

BR, VaneB

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abdul_rahman
Contributor III

Hi @VaneB 

I have attached the .zip file of the project that the code is in. I'm using version 4.0.0 of PlatformSDK kit from NXP. 

P.S.: Is it necessary to use both Cortex-M7_0_0 (Boot) and Cortex-M7_0_2 files for programming S32K358? Why does the design studio make two files for this processor and only one file for S32K344??

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

I have flashed your code on my S32K3X8EVB-Q289 and I did not get a bus Fault. Are you using a custom board?

Is it necessary to use both Cortex-M7_0_0 (Boot) and Cortex-M7_0_2 files for programming S32K358? No, depends if you want to work with multicore. 

Why does the design studio create two files for this processor and only one file for S32K344? Because S32K358 devices have 1 LS core and 1 single core and S32K344 devices have only 1 LS core. So one project is created for each device core.

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abdul_rahman
Contributor III

Hi @VaneB 

Yes, you are right. I'm using a custom made board which uses the S32K358. What may the problem then?

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

It seems to be a hardware problem. Since the Hard fault occurs during clock initialization, a possible root cause could be the connections of the EXTAL and XTAL pins, for this you can use as a reference the Hardware Design Guidelines for S32K3xx Microcontrollers.

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abdul_rahman
Contributor III

Hi @VaneB 

As per the Hardware Design Guidelines for S32K3xx Microcontrollers the crystal oscillator design of our hardware seems to be correct. What could be other possible hardware/software reason(s) for the BusFault and HardFault errors?

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VaneB
NXP TechSupport
NXP TechSupport

Hi @abdul_rahman 

From the shared images I deduce that it is a clock problem because the failure occurs in the Clock_Ip_init() function. To verify if this is the case, test the Clock_Ip_Example_S32K358 making the necessary changes to match your HW.

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abdul_rahman
Contributor III

Hi @VaneB 

You were right about the failure in the Clock_Ip_init() function. The problem was not with the hardware. The problem was in specifying the right clock frequency in the FXOSC section in the clock configuration tool (which makes the Clock_Ip_init() function). My custom hardware was using 40 MHz oscillator and I was running the code in 16 MHz FXOSC in the clock configuration tool of my program. Once I changed that to 40 MHz and uploaded the code again, the busfault error was gone and the code was running. 

Thanks for all the help you have given me sir. I deeply appreciate it.

 

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