About error and status register 1

[buccno]

Can't we use Error Flags BITERR1, BITERR0, AKERR, CRCERR, FRMERR, and STFERR in the ESR1 register without pretended networking mode?

for example, I use flexcan in normal mode,  I have 64 bytes of data. I have 5 nodes to send messages to and 5 nodes to receive messages. What will be triggered when I enter the interrupt where I get an ACK error in the data transfer that I will make periodically? What will be triggered when the CRC error is set? Can I read these error flags only when I configure pretended networking mode? I am using s32k116

[PetrS]

Hi,

error flags reading can be done in any mode, usually in Normal mode, errors are managed as per CAN Standard. Refer to ECR and ESR1 registers description within RM for more info.
Once error is detected during transmission/reception, error counters are updated as per rules defined in the CAN Standard, ERRINT or the ERRINT_FAST bit is set together with read only error bits indicating type of error detected. Note reading ESR1 clears the respective error bits that were set since the last read access. If error is detected during transmission a FlexCAN module is retransmitting frame automatically.

BR, Petr

[buccno]

Ok, I got it. I have one more question,

in flexcan irq module,

default interrupt handler signatures; these; CAN0_ORed_Err_Wakeup_IRQHandler() and CAN0_ORed_0_31_MB_IRQHandler().

#if (CAN_INSTANCE_COUNT > 0U)
/* Implementation of CAN0 IRQ handler for OR'ed interrupts (Bus Off,
Transmit Warning, Receive Warning, Error, Wakeup). */
void CAN0_ORed_Err_Wakeup_IRQHandler(void)
{
FLEXCAN_IRQHandler(0U);
}

/* Implementation of CAN0 IRQ handler for interrupts indicating a successful
transmission or reception for Message Buffers 0-31. */
void CAN0_ORed_0_31_MB_IRQHandler(void)
{
FLEXCAN_IRQHandler(0U);
}
#endif /* (CAN_INSTANCE_COUNT > 0U) */

#elif (defined (CPU_S32K142) || defined (CPU_S32K144HFT0VLLT) || defined (CPU_S32K144LFT0MLLT) ||\
defined (CPU_S32K146) || defined (CPU_S32K148) || defined (CPU_S32MTV) || defined (CPU_S32K116)\
|| defined (CPU_S32K118) || defined (CPU_S32K144W) || defined (CPU_S32K142W))

/*******************************************************************************
* Code
******************************************************************************/
#if (CAN_INSTANCE_COUNT > 0U)
/* Implementation of CAN0 IRQ handler for OR'ed interrupts (Bus Off,
Transmit Warning, Receive Warning). */
void CAN0_ORed_IRQHandler(void)
{
FLEXCAN_BusOff_IRQHandler(0U);
}


but there is a CAN0_ORed_IRQHandler function within the scope of the #elif directive, this function calls FLEXCAN_BusOff_IRQHandler directly. The function description is the same as CAN0_ORed_Err_Wakeup_IRQHandler(). This part confused me. Do I need to do anything specifically for the busoff_irq handler or does it get triggered when the error counter exceeds 255?

[PetrS · Accepted solution]

Hi,

if the SDK is used then error interrupt is called once error is detected. You can install error callback to know when it is executed. Could below example be helpful?
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-FlexCAN-TX-RX-Error-ISR-test-S32DS2...

BR, Petr

[buccno]

It was really helpful thank you