While debugging peripheral clocking issues after jumping from the bootloader I found the following in the clocks.c reset_clock() function:
SCG->FIRCDIV |= SCG_FIRCDIV_FIRCDIV2(0b000); /* Disable FIRC divider */
This code does not change the FIRDIV register because it is an "or" with zeros.
The corrected code is:
SCG->FIRCDIV &= ~SCG_FIRCDIV_FIRCDIV2(0b111); /* Disable FIRC divider */
The code also does not restore the clock source for the LPUARTs in the Uart.c void UART_Reset(LPUART_Type *pUART) function to the original clock source of '0', leaving it set to clock source 3 as set in the UART_Init function.
Solved! Go to Solution.