ADC1 Legacy Code Upgrade - Need More Channels Enabled

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ADC1 Legacy Code Upgrade - Need More Channels Enabled

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Tim_Z
Contributor I

I'm sure I'm missing something simple, but I'm working with a bit of code I didn't configure for the K144 MCU that is being used on a new PCBA. The existing code reads four channels on ADC1, so SC0:SC3, [SE7, SE6, SE10, SE11] are configured. This code works fine.

I now need to enable two more channels SE12 and SE13, but I can't seem to figure out the initialization of the configuration. I am not sure that I have the channels properly connected to the pins and then turned-on to sample.

Here is the code that works for four channels.

____
 
#if  ENABLE_ADC1_INIT
    /******************************************************
     * Initialize ADC1:
     * ADC1_SE7, ADC1_SE6, ADC1_SE10, ADC1_SE11, [ADC1_SE12, ADC1_SE13: Are these properly configured?]
     * hardware trigger,
     * single conversion, 12-bit resolution
     ******************************************************/

    PCC->PCCn[PCC_ADC1_INDEX] |= (PCC_PCCn_PCS(3) | PCC_PCCn_CGC_MASK);
    /* PCS = 3: Select FIRCDIV2 */
    /* CGC = 1: Enable bus clock in ADC1 */

 
#if ENABLE_ADC_CALIBRATION
    // Mandatory calibration
    ADC1->CLPS = 0U;
    ADC1->CLP0 = 0U;
    ADC1->CLP1 = 0U;
    ADC1->CLP2 = 0U;
    ADC1->CLP3 = 0U;
    ADC1->CLP9 = 0U;
    ADC1->CLPX = 0U;
    ADC1->SC3  = ADC_SC3_CAL_MASK | ADC_SC3_AVGE_MASK | ADC_SC3_AVGS(3);

    while (0UL == ((ADC1->SC1[0] & ADC_SC1_COCO_MASK) >> ADC_SC1_COCO_SHIFT))
    {
        /* Wait for completion of calibration */
    }
#endif // ENABLE_ADC_CALIBRATION

    ADC1->CFG1 = ADC_CFG1_MODE(1);   /* MODE = 1: 12-bit conversion */
    ADC1->SC2  = ADC_SC2_ADTRG_MASK; /* ADTRG = 1: HW trigger */

    ADC1->SC3 = 0U;
    /* ADCO = 0: One conversion performed */
    /* AVGE,AVGS = 0: HW average function disabled */

    // Enable module for conversions
    ADC1->SC1[0] = ADC_SC1_ADCH(7);  // ADC1_SE7 selected for ADC1_SC1A
    ADC1->SC1[1] = ADC_SC1_ADCH(6);  // ADC1_SE6 selected for ADC1_SC1B
    ADC1->SC1[2] = ADC_SC1_ADCH(10); // ADC1_SE10 selected for ADC1_SC1C
    ADC1->SC1[3] = ADC_SC1_ADCH(11); // ADC1_SE11 selected for ADC1_SC1D
    ADC1->SC1[4] = ADC_SC1_ADCH(12); // ADC1_SE12 selected for ADC1_SC1E //my new line
    ADC1->SC1[5] = ADC_SC1_ADCH(13); // ADC1_SE13 selected for ADC1_SC1F //my new line
#endif                               // ENABLE_ADC1_INIT
______
 
The two new channels [//my new line(s)] read '0' counts when I loading them with these lines:

    hardware_ad_pid1_counts = ADC1->R[4];
    hardware_ad_pid2_counts = ADC1->R[5];
 
If I assign ADC1->SC1[1] = ADC_SC1_ADCH(12);, then I can get the expected PTA15 reading on ADC1->R[1] so it seems to not be sampling the two added channels.
 
I have seen a reference that SC1[0]:[3] are handled differently, but I haven't been able to figure out what I need to add/fix to my code to get ADC readings from pins PTA15 & PTA16 turned on.
 
Can anybody suggest a fix?

Thanks in advance.
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Robin_Shen
NXP TechSupport
NXP TechSupport

Hi

According to your code: ADC1->SC2 = ADC_SC2_ADTRG_MASK; /* ADTRG = 1: HW trigger */
Hardware Trigger is used in your project.
Did you configure Hardware Trigger for those two new added channels?
Please read 44.5.3 Hardware trigger and channel selects and of S32K1XXRM Rev14.1.
Figure 48-1 The ADC triggering scheme shows the ADHWTS A:D of the first four channels SC1 [0]: [3] are different from others, please note that:

Figure 48-1. ADC triggering scheme.png


Best Regards,
Robin
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Tim_Z
Contributor I

<Did you configure Hardware Trigger for those two new added channels?>

No. I'm sure that this is the problem, but I cannot find an application note for configuring it for the new channels, five and six.

The new channels need to be read at startup but differ from the first four channels that convert for the duration of the product's run time. The new channels could have a single conversion or could be part of the regular ADC1 conversions of the first four, and then be disabled, while the first four continue.

Is there an example of setting channels (my 5 & 6) that are not part of the first four special channels that I can read?

Tim

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Robin_Shen
NXP TechSupport
NXP TechSupport

I don't know the specifics of your application, so you need to consider how to sample the remaining 2 ADC channels.
There are very few bare metal codes. It is recommended to refer to:
ADC Software Trigger examples in the AN5413 S32K1xx Series Cookbook and AN5413SW.zip for your reference.
Example S32K144 PDB ADC trigger DMA ISR S32DS

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