I'm sure I'm missing something simple, but I'm working with a bit of code I didn't configure for the K144 MCU that is being used on a new PCBA. The existing code reads four channels on ADC1, so SC0:SC3, [SE7, SE6, SE10, SE11] are configured. This code works fine.
I now need to enable two more channels SE12 and SE13, but I can't seem to figure out the initialization of the configuration. I am not sure that I have the channels properly connected to the pins and then turned-on to sample.
Here is the code that works for four channels.
Hi
According to your code: ADC1->SC2 = ADC_SC2_ADTRG_MASK; /* ADTRG = 1: HW trigger */
Hardware Trigger is used in your project.
Did you configure Hardware Trigger for those two new added channels?
Please read 44.5.3 Hardware trigger and channel selects and of S32K1XXRM Rev14.1.
Figure 48-1 The ADC triggering scheme shows the ADHWTS A:D of the first four channels SC1 [0]: [3] are different from others, please note that:
Best Regards,
Robin
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<Did you configure Hardware Trigger for those two new added channels?>
No. I'm sure that this is the problem, but I cannot find an application note for configuring it for the new channels, five and six.
The new channels need to be read at startup but differ from the first four channels that convert for the duration of the product's run time. The new channels could have a single conversion or could be part of the regular ADC1 conversions of the first four, and then be disabled, while the first four continue.
Is there an example of setting channels (my 5 & 6) that are not part of the first four special channels that I can read?
Tim
I don't know the specifics of your application, so you need to consider how to sample the remaining 2 ADC channels.
There are very few bare metal codes. It is recommended to refer to:
ADC Software Trigger examples in the AN5413 S32K1xx Series Cookbook and AN5413SW.zip for your reference.
Example S32K144 PDB ADC trigger DMA ISR S32DS