ADC output error

[sarwath]

Hello Community,

S32k144 part number : FS32K144HAT0MLLT

I am facing issue with the ADC conversion.

My bus clock (48Mhz) and ADC clock (24MHz) with 12 bit resolution and 12 sample time.

Vin= 0 to 3.3v.

I am got the ADC output for my Vin (0 to 3.3). I only get results 0 or 4095. I'm not getting a linear output. Instead, I'm getting low(0) and high(4095) values . How to solve this problem.

Thanks in advance,

Sarwath

[RachelGomez123]

One way to reduce ADC errors is to augment the design by using larger analog components. This approach improves matching, and therefore distortion numbers, but requires more area and power.

Regards,

Rachel Gomez

[danielmartynek · Accepted solution]

Hello @sarwath,

Can you scope the Vin signal during the conversion?

Do you use the correct channel?

Please double check the VREFH reference.

Have you tried using a longer sample time or slower ADC clock?

Thanks,

BR, Daniel

[sarwath]

Hello @danielmartynek ,

I am using FIRC as my system source clock and SPLL , SOSC are disabled.

Yes I  verified the Vin signal during the conversion. It is constant 1.5v

I am using channel ADC0_SE4.

 VREFH =3.3v.

I gave longer sample time =250 and slower ADC clock =24Mhz and I am still getting the output RA as 0 or 4095.

I have attached my register values below,

B.R,

Sarwath

[danielmartynek]

Hello @sarwath,

Do you use PTB0?

What is the ADC_INTERLEAVE_EN configuration in your project?

Regards,

Daniel

[sarwath]

Hello @danielmartynek ,

Thanks for your response.

We found the problem root cause. ADC VREFH and VREHL pins supply are given wrongly. Now we corrected that and adc is working good.

BR,

Sarwath

[sarwath]

Hello,

I have attached my ADC0 register values,

RA values is 0xFFF so I am getting 4095 as my ADC0 result