I use the ADC hardware trigger example for S32K144 to read ADC using the PDB trigger.
Is it possible to selectively read ADC channels using a hardware trigger?
I have supplemented the ADC hardware trigger example with additional channel 4. The changes are shown in red:
// adConv1.c
/*! adConv1 configuration structure */
const adc_converter_config_t adConv1_ConvConfig0 = {
.clockDivide = ADC_CLK_DIVIDE_1, //ADC_CLK_DIVIDE_4,
.sampleTime = 255U,
.resolution = ADC_RESOLUTION_12BIT,
.inputClock = ADC_CLK_ALT_1,
.trigger = ADC_TRIGGER_HARDWARE,
.pretriggerSel = ADC_PRETRIGGER_SEL_PDB,
.triggerSel = ADC_TRIGGER_SEL_PDB,
.dmaEnable = false,
.voltageRef = ADC_VOLTAGEREF_VREF,
.continuousConvEnable = false,
.supplyMonitoringEnable = false,
};adc_chan_config_t adConv1_ChnConfig0 = {
.interruptEnable = true,
.channel = ADC_INPUTCHAN_EXT12,
};
adc_chan_config_t adConv1_ChnConfig1 = {
.interruptEnable = true,
.channel = ADC_INPUTCHAN_EXT10,
};// main.c
void ADC_IRQHandler(void)
{
/* Get channel result from ADC channel */
ADC_DRV_GetChanResult(ADC_INSTANCE, 0U, (uint16_t *)&adcRawValue);
/* Set ADC conversion complete flag */
adcConvDone = true;
}int main(void) {
...
ADC_DRV_ConfigConverter(ADC_INSTANCE, &adConv1_ConvConfig0);
ADC_DRV_AutoCalibration(ADC_INSTANCE);
ADC_DRV_ConfigChan(ADC_INSTANCE, 0UL, &adConv1_ChnConfig0);ADC_DRV_ConfigChan(ADC_INSTANCE, 4UL, &adConv1_ChnConfig1);
...
}
Could people from NXP clarify the following questions?
1. I can see ADC_IRQHandler being triggered, but cannot find a way to get the channel number for which the ADC is triggered for. Is it possible to get the ADC channel number in the ADC_IRQHandler?
2. Will the ADC_IRQHandler be triggered only for channels 0 and 4 or it will span over all the channel from 0 to 4?
3. Is there a good and simple manual to better understand the ADC hardware working logic when it is coupled with PDB?
Thanks a lot for any clarification.
Solved! Go to Solution.
Hello @davithakobyan,
1.
You can read the flags like this:
2.
Yes you can select which ADC channels get triggered.
In the example above, ADC0_ch0 is triggered when PDB_CNT == delayValue/2, and ADC0_ch4 when PDB_CNT == delayValue.
NOTE:
In the example, the adcConvDone flag can be set only once both ADC results are ready.
Otherwise it would trigger the PDB again before the ADC conversion is complete.
3.
I believe these two documents can help you
https://www.nxp.com/docs/en/application-note/AN4822.pdf
https://www.nxp.com/docs/en/supporting-information/Programmable-Delay-Block-Training.pdf
Regards,
Daniel
can you tell me how can we use adconvdone flag here and if it posible attache your total snippet also thank you
Hello @davithakobyan,
1.
You can read the flags like this:
2.
Yes you can select which ADC channels get triggered.
In the example above, ADC0_ch0 is triggered when PDB_CNT == delayValue/2, and ADC0_ch4 when PDB_CNT == delayValue.
NOTE:
In the example, the adcConvDone flag can be set only once both ADC results are ready.
Otherwise it would trigger the PDB again before the ADC conversion is complete.
3.
I believe these two documents can help you
https://www.nxp.com/docs/en/application-note/AN4822.pdf
https://www.nxp.com/docs/en/supporting-information/Programmable-Delay-Block-Training.pdf
Regards,
Daniel
Thanks a lot for very helpful response.