Hi,
could one of below examples be useful?
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-PDB-ADC-trigger-DMA-ISR-S32DS/ta-p/...
https://community.nxp.com/t5/S32K-Knowledge-Base/Example-S32K144-PDB-ADC-DMA-S32DS-ARM-2018-R1/ta-p/...
BR, Petr
Hi,
seems it is due to sample time is set to be inconsistent with PDB setting. Change ADC0 clock to run from FIRC DIV2 in Clocks tool. Set sample time = 14 in ADC component. Finally if 14 samples are read by DMA, then config 14 pretriggers in PDB0_init.
BR, Petr