32K144 clock configuration

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

32K144 clock configuration

Jump to solution
6,012 Views
sarwath
Contributor IV

Hello Community,

1. what is the difference between core clock, system clock , bus clock and flash clock.

2. I configured the mcu with 48MHZ FIRC , 8 MHZ  SIRC and 40 MHZ SOSC (RUN MODE). System clock selector (FIRC_CLK). SPLL is disabled . check the below screenshot.

sarwath_0-1671620913729.png

3. Now in RUN mode (without SPLL), I can achieve upto 48 MHZ with FIRC. My question is If I want to achieve 80 MHZ what configuration I have to do.

4. SPLL CLK min is 90 MHZ and My MCU max clock is 80MHZ. So I disabled the SPLL.

Thanks in advance,

Sarwath

Tags (1)
0 Kudos
Reply
1 Solution
5,962 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @sarwath 

The output frequency of the SPLL must be in range of 180 MHz - 320 MHz, the ones that can be configured in 80MHz are the SPLLDIV1_CLK and SPLLDIV2_CLK.

Refer to the image below which shows the settings I made:

VaneB_0-1672162154703.png

 

View solution in original post

9 Replies
5,994 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @sarwath 

See section 27.3 Clock definitions of the S32K1xx MCU Family - Reference Manual
Regarding to the configuration of the clocks I suggest you use the Cloks tool from ConfigTools included in S32DS 3.4, where you can try different configurations to obtain the desired values.

 

B.R.

VaneB

0 Kudos
Reply
5,989 Views
sarwath
Contributor IV

Hello @VaneB ,

Thanks for your response.

I read the section 27.3 and I configured the clock in processor expert. 

sarwath_0-1671685883611.png

My S32K144 part number (FS32K144HFT0MLLR), its max clock speed is 80 MHZ. Currently I am configured to 48MHZ by FIRC_CLK. 

I tried to configure 80 MHZ with SPLL but I got warning due to SPLL min and max frequency. If I want achieve the 80 MHZ what configuration I have to do in processor expert clock settings.

sarwath_1-1671686272095.png

 

Thanks in advance,

Sarwath

0 Kudos
Reply
5,974 Views
sarwath
Contributor IV

Hello @VaneB ,

Any update for my clock setting query.

B.R,

Sarwath

0 Kudos
Reply
5,963 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @sarwath 

The output frequency of the SPLL must be in range of 180 MHz - 320 MHz, the ones that can be configured in 80MHz are the SPLLDIV1_CLK and SPLLDIV2_CLK.

Refer to the image below which shows the settings I made:

VaneB_0-1672162154703.png

 

5,953 Views
sarwath
Contributor IV

Thanks @VaneB  . I'm just curious which IDE you're using. I'm using the S32DS IDE, and I don't see any clock setting GUIs like yours.

0 Kudos
Reply
5,944 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @sarwath 

It is the clock tool included in Config Tools.

VaneB_0-1672241197528.png

 

0 Kudos
Reply
5,932 Views
sarwath
Contributor IV

Hi @VaneB,

Why are my S32DS options so different from yours? I have the processor expert instead of config tools.

sarwath_0-1672309711608.png

 

 

0 Kudos
Reply
5,920 Views
VaneB
NXP TechSupport
NXP TechSupport

Hi @sarwath 

It is because the version is S32 Design Studio 3.4 – Windows/Linux 

0 Kudos
Reply
5,930 Views
sarwath
Contributor IV

Hi @VaneB ,

S32k144 part number : FS32K144HAT0MLLT

 I understood how to run my MCU @80Mhz. Now I want to change the system clock source because the FIRC is selected as the system clock source by default (48MHz).

how to modify the system clock source to select the SPLL as source.

I thought the below instruction will set SPLL as system clock source

//Configure the system clock source and dividers, depending on power mode
SCG->RCCR =

SCG_RCCR_SCS(6)|SCG_RCCR_DIVCORE(1)|SCG_RCCR_DIVBUS(1)|SCG_RCCR_DIVSLOW(2);

But I am not getting SPLL as system clock source.

sarwath_0-1672315228521.png

 

In all examples they following instructions are used to set clocks,

sarwath_1-1672315285844.png

If I use above code to set the clocks I am getting hard fault.  I want to know why the above clock settings is not working for me.

Thanks in advance,

Sarwath

 

0 Kudos
Reply