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**************************************************************************************** Detailed Description: This is a rather simple example that shows LPI2C0 in Master mode. MPL3115A2 sensor is used as a slave device. I2C bus at PTA2 SDA, PTA3 SCL (2-pin open drain mode), external pull-up resistors on BRKTSTBC-P3115 board. BRKTSTBC-P3115 supplied from P3V3 (J3.7). Baud rate 400kHz, source SIRCDIV2 8MHz. The master reads periodically MPL3115A2 status register (every 200ms) and temperature / altitude data once they are ready. ------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100, BRKTSTBC-P3115 MCU: S32K144 0N57U IDE: S32DSR1, OpenSDA Target: internal_FLASH ****************************************************************************************
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******************************************************************************************************************************************** Detailed Description: This example shows use of RTC in VLPS mode. The MCU is put into the VLPS mode (Sleep-On-Exit). RTC alarm interrupt brings it to VLPR every 3s and toggles BLUE LED (PTD0). Since it works in the Sleep-On-Exit mode, after the ISR, the MCU goes to VLPS again without calling the WFI instruction. When BTN0 (S32K144 EVB) is pressed, the power mode switch from VLPS to VLPR and other way round. Interrupt is triggered on rising edge (PTC12), filtered by digital filter (clocked from LPO). In VLPR, RTC seconds interrupt is enabled as well and toggles RED LED (PTD15) in the ISR. RTC_CLKOUT (1Hz) and CLKOUT (bus_clk) can be monitored at PTD13 and PTD14 respectively. CLKOUT is not available in VLPS. The MCU needs to be power-cycled and run stand-alone. -------------------------------------------------------------------------------------------------------------------------------------------------------------------- Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DS_ARM_2.2, OpenSDA Target: internal_FLASH ********************************************************************************************************************************************
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You can find here a reference code for a march c software test in order to test RAM memories
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******************************************************************************** Detailed Description: This example shows the use of SRAM retention after SW reset. The SW reset is triggered by pressing the SW3 button on the S32K144 EVB The reset is delayed in RCM module: 514 LPO cycles. In the RCM interrupt, SRAMU_RETEN and SRAML_RETEN are cleared allowing to retain SRAM data during the reset. After software reset, SRAMU_RETEN and SRAML_RETEN are set to1 to allow accesses to SRAM.  During software initialization in the startup_S32K144.S, ECC RAM initialization is skipped.  After that, we can check the written data before reset are still placed in the SRAM.  ------------------------------------------------------------------------------ Test HW: S32K144EVB-Q100 MCU: S32K 0N57U Debugger: S32DSR1 ********************************************************************************
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******************************************************************************** * Detailed Description: * RAM self-test is performed after reset in startup_S32K144.s file. * The RAM self-test should be executed right after reset, so it does not destroy * data loaded to RAM by init functions. The code is inserted after * initialization of core registers. RAM initialization is commented out because * the same operation is done by the self-test. * The test flow is: * 1. Write pattern 0x55AA55AA to first word in RAM * 2. Read the data back * 3. Compare the data and increment error counter if not equal * 4. Write inverse pattern 0xAA55AA55 to first word in RAM * 5. Read the data back * 6. Compare the data and increment error counter if not equal * 7. Clear the first word in RAM to leave whole RAM erased to ‘0’ at the end of test * This procedure is repeated for whole RAM. * If the error counter is different from zero at the end, the program stays in * endless loop until watchdog reset. * * ------------------------------------------------------------------------------ * Test HW:         S32K144EVB-Q100 * MCU:             FS32K144UAVLL 0N57U * Fsys:            Default * Debugger:        Lauterbach Trace32 * Target:          internal_FLASH * ********************************************************************************
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/******************************************************************************** Detailed Description: Example shows possible implementation of multiple ADC conversions using SDK. Here 25 channels are sampled periodically. 2 ADC modules and 2 PDBs are used. ADC0 is configured to sample 16 channels, ADC1 9 channels. PDBs are set to back-to-back mode to perform chain conversion. Within ADC component you need to select ADC input to be measured for each item in configuration list. For ADC0 channels ADC ch12 is selected, as it is connected to trimmer on the EVB. DMA is used to read result into single buffer, and DMA callbacks are issued to indicate end of transfer for each ADC module. Within those callbacks PTE14 and PTE15 is toggled. PDB0 output pulse is generated on the PTE16 to indicate start of ADC measurement. This is done periodically at LPIT ch0 rate, which is set to 30us. The ADC0 ch0 result is used to dim LEDs. * ------------------------------------------------------------------------------ * Test HW:       S32K144EVB-Q100 * MCU:           FS32K144UAVLL 0N57U * Target:        Debug_FLASH * EVB connection: * Compiler:      S32DS.ARM.2018.R1 * SDK release:   S32SDK_S32K1xx_RTM_3.0.0 * Debugger:     Lauterbach Trace32 ******************************************************************************** Revision History: Ver Date          Author          Description of Changes 0.1 May-04-2019   Petr Stancik    Initial version *******************************************************************************/
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*******************************************************************************  The purpose of this demo application is to present a usage of the FEE MCAL Driver for the S32K3xx MCU. This example read & write 4 byte FEE BLock. I have renamed the FEE block using a MACRO as FOUR_BYTE_EEPROM_FEE_VARIABLE. The example uses MEM_InFls driver to write 128 bytes to FLASH memory address  0x52_0000 .  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the FEE MCAL Driver for the S32K3xx MCU. This example read & write 4 byte FEE BLock. I have renamed the FEE block using a MACRO as FOUR_BYTE_EEPROM_FEE_VARIABLE.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Driver configuration :--   Three FEE blocks are created. Each FEE block can be considered as EEPROM variables    How customer can use FEE block as EEPROM variable. Max size of FEE block :--     You can declare a MACRO for the Variable of EEPROM :-- FOUR_BYTE_EEPROM_FEE_VARIABLE How to Read and write the FEE variables :--  
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 ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** Example MCAL S32K312 MEM_InFls  DS3.5 RTD300 :-- Example MCAL S32K312 MEM_InFls DS3.5 RTD300 - NXP Community Example MCAL S32K312 FEE DS3.5 RTD300 :-- Example MCAL S32K312 FEE DS3.5 RTD300 - NXP Community Example MCAL S32K312 FEE and MEM_InFls DS3.5 RTD300 :-- Example MCAL S32K312 FEE and MEM_InFls DS3.5 RTD300 - NXP Community Example MCAL S32K312 PWM ICU using Custom IRQ EMIOS DS3.5 RTD300 :-- Example MCAL S32K312 PWM ICU using EMIOS DS3.5 RTD300 - NXP Community Example ASR S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 :-- Example ASR S32K312 EMIO PWM Generation & Duty capture using Interrupt DS3.5 RTD300 - NXP Community  Example ASR S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 :-- Example ASR S32K312 EMIO PWM Generation & Duty capture using Polling DS3.5 RTD300 - NXP Community
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*******************************************************************************  The purpose of this demo application is to present a usage of the  FlexCAN IP Driver for the S32K3xx MCU.  The example uses FLEXCAN-0 for transmit & receive using following Message buffer :-- #define RX_MB_IDX_0 10U #define RX_MB_IDX 11U #define TX_MB_IDX 12U BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************        
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*******************************************************************************  The purpose of this demo application is to present a usage of the Bootloader Jump to Application.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************   Jump is decided based on the boot_header, size we use to jump to the RESET handler:--   Cortex M-7 Interrupt vector table, RESET handler is 4 byte offset from starting of vector table :--   // Reset_Handler+1  --> required in IVT, to avoid hard fault As per Arm®v7-M Architecture Reference Manual  --> DDI0403E_e_armv7m_arm.pdf         How to burn elf file of both application & bootloader code :--  
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*******************************************************************************  The purpose of this demo application is to present a usage of the Printf Semihosting for the S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Create New project :-- Select Semi hosting library in project Properties :-- In Debugger setting :--- Include file :-- #include <stdio.h> Output :--    
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******************************************************************************* The purpose of this demo application is to use pad keeping for  PINS and enter the standby mode & before entering the standby mode update variables in Standby RAM memory with pin state. Once wake up from the standby mode update the pins values from the STANDBY RAM variables.  S32K3xx MCU.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE Micro * Target: internal_FLASH ******************************************************************************** =============== How this DEMO works ========== Before entring standby :-- Before entering standby mode, i make BLUE LED high SW6 on board pressed to enter the standby mode. Wakeup from Standby :-- SW5 on board pressed to wakeup from standby After wakeup from Stand by:-- I glow Green LED Unglow the BLUE LED Wait for SW6 on board to be pressed to enter the standby mode. ===============  Stand by RAM location =============== As noted, the Standby SRAM is allocated at the first 32 KB of the SRAM Memory. https://www.mouser.com/pdfDocs/S32K3MemoriesGuide.pdf =============== Pins used for PAD keeping =============== PTA30, PTA31, PTD14     =============== Switches used ===============   Enter Standby mode, by pressing SW6 on Board EXIT Standby mode, by pressing SW5 on Board =============== Wakeup source, SW5 PTB26 =============== =============== WKPU[41]  ---> WKPU_CH_45=============== Because First 4 WKPU are timers, so 41 + 4 = 45   =============== Linker file changed =============== Added Standby RAM memory & sections for standby RAM memory. Changes can be seen by comparing the original linker file      =============== Startup file changed , startup_cm7.s =============== Added call to Initialise the Standby RAM Changes can be seen by comparing the original startup_cm7.s file     ======================= How to verify if Standby RAM is working =============== 1> Declare two variables in file Wkup.c :-- __attribute__ ((section (".standby_ram_data"))) volatile int test_0_value ; __attribute__ ((section (".standby_ram_data"))) volatile int test_1_value ;   2> function set_pin_value() will be called before entering the standby mode. Initialise the values to these two variables inside function set_pin_value() in file Wkup.c.   3> Now burn the code inside the MCU using the PE micro debugger.     Once code is burned do not run the code & disconnect the debugger. 4> Power OFF and power ON the S32K312 board. Now code is waiting to enter standby mode. Press switch SW6 MCU will enter standby mode & Blue LED glowing. Press switch SW5 MCU will wakeup from the standby mode. Code will Now code is waiting to enter standby mode 5> Now open your debugger configuration, and attach to running target.   6> Once connected click on the ELF file & press pause button.   7> In Debug window you can see the value of variables test_0_value & test_1_value same as initialised before entering the standby mode.      
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*******************************************************************************  The purpose of this demo application is to present a usage of the  FlexCAN IP Driver for the S32K3xx MCU.  The example uses FLEXCAN-0 for transmit & receive Tusing following Message buffer :-- #define RX_MB_IDX_0 10U #define RX_MB_IDX 11U #define TX_MB_IDX 12U FIFO Receive Message from range :-- 0x01 to 0x16 BAUDRATE : 500 KBPS  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ********************************************************************************    
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*******************************************************************************  The purpose of this demo application is to present a usage of the  ADC_SAR and BCTU IP Driver for the S32K3xx MCU.  The example uses the PIT0 trigger to trigger BCTU conversion list to  perform  conversions on ADC1.  ADC channels  are selected to be converted on  ADC-1:  ADC1: P0, p1, p2, p3, p4, p5, p6, S10  Converted results from  BCTU_ADC_DATA_REG are moved by DMA into result array.  ADC channel S10 is connected to board's potentiometer.  ------------------------------------------------------------------------------ * Test HW: S32K3X2EVB-Q172 * MCU: S32K312 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: PE micro * Target: internal_FLASH ******************************************************************************** Set PIT Freeze Enable :--- All channels are for ADC-1 , in BCTU list :--     "NEW DATA DMA enable mask" :-- controls These bit field in MCR register     "ADC target mask" :-- It controls "ADC_SEL " bit field in "Trigger Configuration (TRGCFG_0 - TRGCFG_71)" for single conversions you can enable only one instance so the possible values for target mask: 1 (0b001) ADC0 2 (0b010) ADC1 3 (0b100) ADC2| for list of conversions we can enable also parallel con version for example 3 (0b011) parallel conversion of ADC0 and ADC1 The trigger is configured as a list of parallel conversions ADC0, ADC1 in “Adc Target Mask”. List of ADC channels is defined in “BCTU List Items” while order is given by the “Adc Target Mask”: BctuListItems_0 is ADC0, BctuListItems_1 is ADC1 etc.      
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*******************************************************************************  The purpose of this demo application is to present a usage of   configure TRGMUX to select triggers for staring Normal/Injected chain conversion. Select PIT0_Ch0 as the hardware trigger source of ADC1_Ch34 & Ch48 via TRGMUX and two LEDs to show the trigger Sequence. ADC1_Ch34 is connected to board's potentiometer,Ch38 is bandgap channel.  ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q257 * MCU: S32K344 * Compiler: S32DS3.5 * SDK release: RTD 3.0.0 * Debugger: OpenSDA * Target: internal_FLASH ********************************************************************************
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Hi all,   Many customers complained about the K3 FlexIO I2S can not support continuous transferring because there is a gap time between 2 times of invoking SendData. This gap time will break the audio continuity and bring jitters. It is gapped by the transfer API closing and re-entry time cost.   To avoid this gap and implement a real continuous transferring, we made some changes with eDMA configurations. Finally, it works!   Besides, we also enabled eDMA half-complete interrupt to support double-buffer (ping-pong buffer) operation for user's further development.   Attachments are the example projects and corresponding introduction slides, please kindly check if you are interested in. Any problem, just let me know. Welcome your comments here.   Best Regards, Shuailin Li NXP GPIS, AE
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******************************************************************************** The purpose of this demo application is to show you the usage of the FlexCAN module configured to use CAN FD and Enhance RXFIFO using the S32 RTD API. - This demo application requires two boards, or single board connected with CAN tool. - CAN FD is enabled with bitrate 500/2000 kbps - MB0 is configured to transmit either std. or ext ID - MB1 is configured to receive ext ID 0xFACE and MB2 to receive std ID 0x1 - Enhanced RXFIFO is enabled and 3 enhanced RXFIFO filter elements (filter + mask scheme) are defined ext ID 0xABCD with mask 0x1FFFFFFF std ID 0x123 with mask 0x7FF std ID 0x456 with mask 0x7FF - Callback function is used as well to handle TX and RX process in MBs and Enhanced RXFIFO - setupCanXCVR function can be called if TJA1153 is used on the board. It expects transceiver in Vanilla state and set TPL to pass all std and ext ID and do not block any message comming from bus. Finally leaving configuration mode without writing to non-volatile memory nor locking the transceiver. * * ------------------------------------------------------------------------------ * Test HW: S32K3444EVB-Q172 * MCU: PS32K344EHVPBS 1P55A * Compiler: S32DS.ARM.3.4 * SDK release: SW32K3_RTD_4_4_2_0_0_D2203 * Debugger: Lauterbach * Target: internal_FLASH * ********************************************************************************
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       This routine implements all four different mask setting methods.Users can refer to these routines to implement some application scenarios.Please note that this routine is for reference only.When posting this routine, I only did some limited tests, and I don't make sure that there are no problems. If you find it, please leave a message and I will revise it in time.       When the program was flashed into the S32K142EVB, the Blue Led will toggles every 500ms, this Led shows that the program is running on well condictions. If a message was received by S32K142EVB from external CAN bus, the Green Led will toggle,at the same time, the S32K142EVB will sent a message to CAN Bus which have the same data with the message received,and the ID is 0x02.At the last,the Red Led will toggle when a CAN error is occurd.   1.FlexCAN Mask Setting Overview          S32K1XX FlexCAN support  Frame mask function ,as you can see the FlexCAN mask can be set to Global Mask or Individual Mask,and user can choose to use FIFO or MB to receive message,but only MB can be used for sending messages.and one more thing you should be care is that the FIFO can not be used for CAN FD,this is because the FIFO data filed only support 8 bit datafiled.           If you use MB14 or MB15, have to set the mask of these tow MBs separately,and you can take a look at the two functions in the below. ->FLEXCAN_DRV_SetRxMb14Mask();  ->FLEXCAN_DRV_SetRxMb15Mask();   2.Hardware Needs. 1.S32k142EVB,(or own made board which can support CAN communications.) 2.CAN TOOL's which used for send or receive messages from CAN Bus on your computer.   If you don't have such tools ,you can use another board which can replace the CAN tools to send or receive CAN messages. 3.S32K142EVB should be powered by external 12V DC, and don't forget to connect the J107 to 1-2.   3.Software Needs. 1.This demo build on S32 Design Studio for ARM V2.2  2.The SDK version is SDK_S32K1XX_15   4.FlexCAN_RX_MB_Mask_Setting 4.1.Set the Mask Type to Global Mask Type.      In this case, we can only receive the messages which ID from 0x300~0x37F and 0x400~0x47F.      If you try to sent the messages with other ID's, the S32K142EVB will not have any reponse!  4.2.Set the Mask Type to Individual Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x400~0x47F. 5.FlexCAN_RX_FIFO_Mask_Setting 5.1.Set the Mask Type to Global Mask Type.      In this routine,we can only receive frames with IDs in the range of 0x10~0x17, 0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87. 5.2.Set the Mask Type to Individual Mask Type.      In this routine, we can only receive frames with IDs in the range of 0x10~0x17,0x20~0x27,0x30~0x37,0x40~0x47, 0x50~0x57,0x60~0x67,0x70~0x77,0x80~0x87.   End       If you need to use CAN FD, please note that FIFO cannot be used. Regarding FIFO, it has three filtering formats, you can refer to the following chapters in the data sheet for details. S32K-RM Rev 13. Chapter:55.4.2.15 Rx FIFO Global Mask register (RXFGMASK) Chapter:55.4.6 Rx FIFO structure          
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******************************************************************************* * * The purpose of this demo application is to present a usage of the ADC_SAR and * BCTU IP Driver for the S32K3xx MCU. * * The example uses the PIT0 trigger to trigger BCTU conversion list. Five standard * ADC channels are selected to be converted. * Converted result from BCTU data register are moved by DMA into result array. * This result array should be placed into no cacheable area if data cache is enabled. * * ADC channel S10 is connected to board's potentiometer, and converted value is * used to dim board's LED. * * * ------------------------------------------------------------------------------ * Test HW: S32K3X4EVB-Q172 * MCU: S32K344 * Compiler: S32DS3.4 * SDK release: RTD 1.0.0 * Debugger: Lauterbach * Target: internal_FLASH ********************************************************************************
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