hello
I have a S32G-VNP-RDB2 board.
I have to develop bootloader.
so I have download Platform_Software_Integration_S32G3XX_2022_02.
I would like to do item 3.3.4.2 in bootloader_UserManual.pdf below.
But I can not find S32DS folder.
I have Tresos folder in realtime folder below.
I want to know where the s32DS folder is.
Solved! Go to Solution.
No S32DS support for that release as well due to the following limitation:
The Mcu components used in Design Studio doesn’t allow multiple
clock setting configuration. Therefore, reverting all clock sources to
their default state cannot be done and loading an image which relies
on PLL clock source will have undefined behavior.
Hi,
Please refer to page 83:
There's no support for S32 Design Studio for the release you are trying to use. Also, please make sure to check the hardware prerequisites as well, because the board you are using doesn't support S32G3XX.
Thanks!
My board is S32G2xx in S32G-VNP-RDB2.
Please see the note below.
The S32DS is said to be able to use the S32G2xx.
Additionally, my Bootloader_UserManual.pdf does not have 83 pages.
You state above "Platform_Software_Integration_S32G3XX_2022_02.", which is an S32G3XX release and hence referring to the user manual pertaining to that release. Can you please confirm that?
Even though the DS support is mentioned in that chapter, there may be some limitations (refer to "Known issues and limitation").
Thanks for the advice. It was my mistake.
I have another Platform_Software_Integration_S32G2XX_2021_09.
Currently available for download S32G2xx, the latest version will be Platform_Software_Integration_S32G2XX_2021_09.
The same content is also in the Bootloader.pdf file of Platform_Software_Integration_S32G2XX_2021_09.
Can you check again based on this version?
No S32DS support for that release as well due to the following limitation:
The Mcu components used in Design Studio doesn’t allow multiple
clock setting configuration. Therefore, reverting all clock sources to
their default state cannot be done and loading an image which relies
on PLL clock source will have undefined behavior.