what is the HW implementation of the Differential bypass FXOSC in the S32GX MCU

[haythemLtifi]

Hello ,

i would like to know how this Differential bypass clock is implemented,

from what i understand , 

-Crystal : using the Xtal and Extal pins and a passive crystal 

-Single-ended bypass :using the Extal pin and an active oscillator

- what about Diffrential bypass? what should the clock be provided from ? how is it connected to the MCU? for exemple the S32G2/S32G3

Source of the screen shot is in the doc below

[alejandro_e]

Hello @haythemLtifi,

That is a great question, it is only mentioned once in the S32G3 reference manual so it may be inaccurate information on the document. I will need to confirm internally.

I will get back to you once I have received feedback from the internal team.

[haythemLtifi]

hello ,
thanks , i need the response as soon as possible , we programmed the fuses on a custom board using the NXP recommended EVK for QSPI flash , and now the board doesnt drive the EXtal signal un run mode , only works in Serial boot , so i belive its waiting for the Differential clock mode , but its not mentioned how to go about providing this clock and what Pins to use and how.
we cant advance on the board with out figuring this out .
thanks

[alejandro_e]

Hello @haythemLtifi,

I understand the urgency of the issue, however since this a possible error in the documentation we will need to wait for the internal team's feedback for mode details.

Answering to your question in the other post. I got that information from an internal document, however as you pointed out, the documentation is quite confusing regarding this matter. However, what you mention seems to be the case, meaning, that the S32G3 is no driving the crystal, which would match the need to use an active device. I have found some contradictory information so far, and therefore I cannot recommend a configuration at the moment, since the risk exist to blow fuses incorrectly. 

Thanks for your patience.