We use 3 pieces of sja1105 serial cascade, and the current Linux kernel we use is 5.10.41(https://github.com/nxp-auto-linux/linux/tree/v5.10.41) .When I try to run ptp4l on multiple ports in the same switch, but there is an error. ptp4l time out while polling for tx timestamp。Also we wanted to run the ptp4l program on the second switch's port but it didn't work，Can't seem to support cascading。 Can someone give me some advice? My need is to enable multiple sja1105 to support the gptp protocol。
the ptp4l error：
my ptp4l configfile:
This is our hardware block diagram：
This is my script to configure the switch：
and my devicetree （Currently I have only configured 2 switches）：
&spi1 {
spi-num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
sja1105q_A@0 {
compatible = "nxp,sja1105q";
spi-max-frequency = <0x3D0900>;
spi-cpha;
fsl,spi-cs-sck-delay = <1>;
fsl,spi-sck-cs-delay = <1>;
reg = <0>;
soft-cs-gpio = <&pcal6524B 17 0>;
reset-gpio = <&pcal6524B 16 0>;
dsa,member = < 0 0 >;
ports {
#address-cells = <1>;
#size-cells = <0>;
switchAp0: port@0 {
ethernet = <&pfe_logif1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "cpu";
reg = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchAp1:port@1 {
phy-handle = <&mdio_a_phy_A1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p1";
reg = <1>;
};
switchAp2: port@2 {
phy-handle = <&mdio_a_phy_A2>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p2";
reg = <2>;
};
switchAp3: port@3 {
phy-handle = <&mdio_a_phy_A3>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p3";
reg = <3>;
};
switchAp4: port@4 {
phy-mode = "rgmii";
sja1105,role-phy;
label = "dsa";
reg = <4>;
link = <&switchBp0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&spi5 {
spi-num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
sja1105q_B@0 {
compatible = "nxp,sja1105q";
spi-max-frequency = <0x3D0900>;
spi-cpha;
fsl,spi-cs-sck-delay = <1>;
fsl,spi-sck-cs-delay = <1>;
reg = <0>;
soft-cs-gpio = <&pcal6524B 19 0>;
reset-gpio = <&pcal6524B 18 0>;
dsa,member = < 0 1 >;
ports {
#address-cells = <1>;
#size-cells = <0>;
switchBp0: port@0 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "dsa";
reg = <0>;
link = <&switchAp4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchBp1: port@1 {
phy-handle = <&mdio_a_phy_B1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p1";
reg = <1>;
};
switchBp2: port@2 {
phy-handle = <&mdio_a_phy_B2>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p2";
reg = <2>;
};
switchBp3: port@3 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p3";
reg = <3>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchBp4: port@4 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p4";
reg = <4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
spi-num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
sja1105q_A@0 {
compatible = "nxp,sja1105q";
spi-max-frequency = <0x3D0900>;
spi-cpha;
fsl,spi-cs-sck-delay = <1>;
fsl,spi-sck-cs-delay = <1>;
reg = <0>;
soft-cs-gpio = <&pcal6524B 17 0>;
reset-gpio = <&pcal6524B 16 0>;
dsa,member = < 0 0 >;
ports {
#address-cells = <1>;
#size-cells = <0>;
switchAp0: port@0 {
ethernet = <&pfe_logif1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "cpu";
reg = <0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchAp1:port@1 {
phy-handle = <&mdio_a_phy_A1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p1";
reg = <1>;
};
switchAp2: port@2 {
phy-handle = <&mdio_a_phy_A2>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p2";
reg = <2>;
};
switchAp3: port@3 {
phy-handle = <&mdio_a_phy_A3>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_A_p3";
reg = <3>;
};
switchAp4: port@4 {
phy-mode = "rgmii";
sja1105,role-phy;
label = "dsa";
reg = <4>;
link = <&switchBp0>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
&spi5 {
spi-num-chipselects = <1>;
#address-cells = <1>;
#size-cells = <0>;
sja1105q_B@0 {
compatible = "nxp,sja1105q";
spi-max-frequency = <0x3D0900>;
spi-cpha;
fsl,spi-cs-sck-delay = <1>;
fsl,spi-sck-cs-delay = <1>;
reg = <0>;
soft-cs-gpio = <&pcal6524B 19 0>;
reset-gpio = <&pcal6524B 18 0>;
dsa,member = < 0 1 >;
ports {
#address-cells = <1>;
#size-cells = <0>;
switchBp0: port@0 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "dsa";
reg = <0>;
link = <&switchAp4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchBp1: port@1 {
phy-handle = <&mdio_a_phy_B1>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p1";
reg = <1>;
};
switchBp2: port@2 {
phy-handle = <&mdio_a_phy_B2>;
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p2";
reg = <2>;
};
switchBp3: port@3 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p3";
reg = <3>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
switchBp4: port@4 {
phy-mode = "rgmii-id";
sja1105,role-phy;
label = "Sw_B_p4";
reg = <4>;
fixed-link {
speed = <1000>;
full-duplex;
};
};
};
};
};
