pcie1 x2 support failed

[shiyiheng]

Greetings;

I am now using the bsp34 version, a board of our own design, adding serdes1 as a pcie1 connection ssd, I see the device tree as follows

serdes1: serdes@44180000 {

#phy-cells = <3>;

compatible = "nxp,s32cc-serdes";

clocks = <&clks S32GEN1_SCMI_CLK_SERDES_AXI>,

<&clks S32GEN1_SCMI_CLK_SERDES_AUX>,

<&clks S32GEN1_SCMI_CLK_SERDES_APB>,

<&clks S32GEN1_SCMI_CLK_SERDES_REF>;

clock-names = "axi", "aux", "apb", "ref";

#address-cells = <3>;

#size-cells = <2>;

num-lanes = <1>; /* supports 1 lane */

resets = <&reset S32GEN1_SCMI_RST_SERDES1>,

<&reset S32GEN1_SCMI_RST_PCIE1>;

reset-names = "serdes", "pcie";

reg = <0x0 0x44180000 0x0 0x108>,

<0x0 0x44183008 0x0 0x10>,

<0x0 0x44182000 0x0 0x800>,

<0x0 0x44182800 0x0 0x800>;

reg-names = "ss_pcie", "pcie_phy", "xpcs0", "xpcs1";

The pcie1 supports two lanes.

[shiyiheng]

Here is the uboot device tree configuration, I see the bsp high version is also

[shiyiheng]

I used the development board of rdb3 to identify the e1000 under uboot, and I found that there was hardware init erro for initializing the e1000. Is there a demo of relevant verification from NXP? I think it may be my device tree configuration problem. I only configured compatible =intel,e1000

[Joey_z]

hi,shiyiheng

We have tested the e1000 under the Linux , it is work normal. 

For now, you can refer to the BSP user manual, no other reference application is provided at this time.

BR

Joey