Updating the Image layout on A53core

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Updating the Image layout on A53core

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ashwini2024
Contributor II

ashwini2024_0-1734440966364.png

I want to update the image layout as per my blob. Is this possible to do ? The above is the snip from the log do compile file which is generated while bitbake. Is it possible to update the offset how to change the offset of HSE ? Which file need to be updated ?

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024

Modifying the image layout is not recommended/supported. 

Can you share why you want to do that?

Also, please share the following information.

Are you using an S32G2 or S32G3?

Are you using a custom board? if not is it an RDB or EVB?

Which BSP version are you using?

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ashwini2024
Contributor II

Thank you for the reply.
I am using s32g3rdb3 board. The bsp version is 40.
I am integrating hse on a53 and m7 core. I am checking if it is possible to update the image layout in the log do compile file as the offset in image layout for hse firmware is mentioned to be 0x1200 and in my blob it is 0x1000.

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024,

When you are mentioning the blob, are you referring to the IVT? If this is the case, I recommend you modify the IVT offset instead of the Image Layout. 

Also, I recommend having the HSE working first on the M7 and after on the A53 separately. This to know each process works and after that do the integration to work from both.

For that download the HSE Demo APP to learn how to do the configuration at the M7 following the Readme.

 

carlos_o_0-1734541688324.png

Remember to download the HSE Version that is compatible with your BSP version. 

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ashwini2024
Contributor II

ashwini2024_0-1735274705175.png

 

Can we store HSE Firmware and HSE SYS-IMG at this location as mentioned from nxp goldvip user manual.

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024,

What is your goal to store it at that specific location?

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ashwini2024
Contributor II

I want to integrate hse on A53 core and M7 core. I want to know how it could be done should i place the hse sys image and hse firmware at the location mentioned in the goldvip user manual. Is it possible to update the image layout or should i update the ivt ?

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024

The recommendation is to update the IVT. 

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ashwini2024
Contributor II

Option 1 : To update the IVT. Am i supposed to update the IVT as per the image layout specification on A53 core ?
Option 2 : To update the image layout on A53 core. Is this particular choice valid or is it possible to do so and how could it be done ?

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024,

The IVT supposed to have the pointers which are required by the BootROM. The generate your own you can read this guide: HOWTO: Use IVT Tool To Create A Blob Image S32G274A

 

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ashwini2024
Contributor II

Hello @carlos_o ,
My aim is to update the image layout on A53 core how can i do that ?

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024 

This is out of my scope. Let me review with the internal team, this may take a longer time response, we appreciate your patience. I'll come ASAP with further information.

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ashwini2024
Contributor II

Thank you so much for the information, i am also checking the same from my side.

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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024 

the internal team share the following information:

The IVT is the first image that BootROM reads from the boot device, the location of the IVT is fixed required by BootROM. As the BootROM is not modifiable, it means that the IVT image structure is not modifiable.

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ashwini2024
Contributor II

I am currently working on the A53 core with Yocto BSP 42, and during the compilation process, I observed the following image layout details in the log.do_compile file :

Image Layout
  DCD:      Offset: 0x200    Size: 0x1c
  IVT:      Offset: 0x1000    Size: 0x100
  HSE Firmware:    Offset: 0x1200
  HSE SYS Image:    Offset: 0x62400    Size: 0xc000
  AppBootCode Header:  Offset: 0x6e400    Size: 0x40
  Application:    Offset: 0x6e440    Size: 0x2f800

Boot Core:  A53_0
IVT Location:  SD/eMMC
Load address:  0x346062c0
Entry point:  0x34610000


Could you kindly help me understand the following:

  1. Which file or configuration in the Yocto build system is responsible for generating or computing this image layout?
  2. How can I locate and modify the source file(s) that define these offsets, sizes, and other parameters?

Your guidance on this matter will be greatly appreciated.

Thank you in advance for your support!




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carlos_o
NXP TechSupport
NXP TechSupport

Hi @ashwini2024,

That configuration is not supported by NXP, please refer to the Yocto Project with further help with this topic. 

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mkayondo
Contributor II
Hi @ashwini2024,
Did you manage to solve this issue?
I am experiencing the same.
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ashwini2024
Contributor II

Hi @mkayondo ,
Are you wanting to update the image layout on A53 core ?

 

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