Unable to Boot M7 on Gold VIP RDB2(S32g274A)

[viswa_kondapall]

We are working on GoldVIP-RDB2. Yocto for A53 and S32 Development studio for M7. we are facing issue in boot M7 core: IVT tool we are using create DCD/blob image to flash M7 through serial bus UART0. S32 Flash tool we using to flash M7. we observed a difference IVT tool screen and to IVT demo video S32.

IVT details:

NXP IVT demo video mentioned "entry" screen to give M7 bin file to flash, but S32 design studio IVT tool not showing entry screen. 

we given project_code_m7.bin in the application bootloader through serial mode UART0, flashing is success but M7 is not booting. i am doubt Application bootloader is writing in bootrom or else where. 

screen is blank after booting.M7 is flashed or stuck etc no information about it.

if SW4: 7th pin is off the A53 is booting. 

Is it "entry" screen option do we need to configure in the project settings ??

My question is:

1. is it "entry" screen required in IVT to flash M7 core or any other way is there to flash M7 in S32G274A.

2.  

[viswa_kondapall]

Hi Daniel,

Every document for M7 flashing is giving IVT procedure steps to flash only. In our case after flashing M7 project bin file to RDB2 sometimes bootrom messages will come and sometimes no messages on A53 console:

Might these from Bootrom:

NOTICE:  Reset status: Power-On Reset

NOTICE:  BL2: v2.5(release):bsp33.0.hf1-2.5-dirty

NOTICE:  BL2: Built : 13:13:01, Aug 11 2022

NOTICE:  BL2: Booting BL31.

1. Then in that case our M7 project bin file writing in Bootrom or Application bootloader ?? is my boubt.

And i doubt on the RAM start pointer(0x3400 0000) and RAM entry pointer(0x34000000) from linker file and map

are these address is correct ??? or wrong ?? or do we need to change address in Linker as per our project ??

2. flashing M7 project bin file flashing through Application bootloader column with interface QSPI is it correct ??

    will it goes to NORflash for M7 external memory ??

Please correct me if i am missing any step in the procedure ?? is that address used from linker is it correct ??

Is this is corret ??? or do we need to change linker file ??? this is from Example CAN2CAN project linker file.

MEMORY
{
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00000000 /* 0KB - Not Supported */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64K */
int_sram_shareable : ORIGIN = 0x22C00000, LENGTH = 0x00004000 /* 16KB */
int_sram : ORIGIN = 0x34000000, LENGTH = 0x00400000 /* 4MB */
int_sram_stack_c0 : ORIGIN = 0x34400000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c1 : ORIGIN = 0x34402000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c2 : ORIGIN = 0x34404000, LENGTH = 0x00002000 /* 8KB */
int_sram_no_cacheable : ORIGIN = 0x34500000, LENGTH = 0x00100000 /* 1MB, needs to include int_results */
ram_rsvd2 : ORIGIN = 0x34600000, LENGTH = 0 /* End of SRAM */

LLCE_CAN_SHAREDMEMORY : ORIGIN = 0x43800000 LENGTH = 0x3C800
LLCE_LIN_SHAREDMEMORY : ORIGIN = 0x4383C800 LENGTH = 0xa0
LLCE_BOOT_END : ORIGIN = 0x4383C8A0 LENGTH = 0x50
LLCE_MEAS_SHAREDMEMORY : ORIGIN = 0x4384FFDF LENGTH = 0x20
}

RAM start pointer is it correct.??

.intc_vector 0x34501000 0x408 ./Project_Settings/Startup_Code/Vector_Table.o

Please correct me if we are doing anything wrong.

[Daniel-Aguirre]

Hi,

We don't understand the following part from your request:

"In our case after flashing M7 project bin file to RDB2 sometimes bootrom messages will come and sometimes no messages on A53 console:

Might these from Bootrom:

NOTICE:  Reset status: Power-On Reset

NOTICE:  BL2: v2.5(release):bsp33.0.hf1-2.5-dirty

NOTICE:  BL2: Built : 13:13:01, Aug 11 2022

NOTICE:  BL2: Booting BL31."

The messages you are showing are from the A53 booting linux (not the BootROM), which should be available on the SD card on your board. As we said before, if your "Application Bootloader" does not boot-up your A53 core, then you will not see any Linux console on the UART0 port.

As you are saying, you are running the CAN2CAN project provided on the RTD+LLCE Firmware, which does NOT boot-up the A53 core, meaning you should not see any output from the UART0 regarding Linux.

Q1 >> Then in that case our M7 project bin file writing in Bootrom or Application bootloader ??

A1 >> Your project will not be written on the BootROM of the S32G platform, the BootROM is not available to modifications. The steps of the Boot flow are shown on the Boot chapter on the S32G2 reference manual.

In summary:

• BootROM will fetch the code provided on the IVT and configure the minimal system for the system to be able to fetch the code and start the application that was copied to internal SRAM. 
• The code provided on the IVT will be your "Application Bootloader", which will be in charge of initializing other cores on the platform (if needed) as well as initialize/configure the needed modules for your specific application.
• If your application bootloader does not explicitly configure other cores to initialize, they will NOT be initialized.

As for the "RAM Entry pointer", we recommend following the "intc_vector" value (or "Reset_Handler", depending on your application specifics), instead of using the "RAM Start pointer" value, this is following NXP examples. This is shown on the AN13750 (mentioned previously) when creating the application bootloader. 

Q2 >> flashing M7 project bin file flashing through Application bootloader column with interface QSPI is it correct ??  will it goes to NORflash for M7 external memory ??

A2 >> If you are looking to boot your platform from the QSPI interface (which is connected to the onboard NOR Flash on the RDB2), then it should be correct.

Please, let us know.

[viswa_kondapall]

Hi Daniel,

Thank you for reply. Your comments cleared our doubts in flashing. 

These address only we are using now : RAM Start pointer is : Sram address(0x34000000) and RAM Entry pointer :(0x34501000 ) INTC_pointer/Reset_verctor address only. Map file and ram_ID file file attached for reference.

Yes : M7 binaries flashed, upon reboot the NO messages on A53 console and M7 is unresponsive with CAN2CAN example project code. Here we blocked.

1. How/Why Bootrom is not taking or unable to take M7 code ??

//-----------------------------------------------------------------------

Sometimes we are getting below message:

Bootloader started

Load application id 0 fragment id 0 of size 1048576 from 0x101240 flash address, time: 5.624 milliseconds

Load application id 1 fragment id 0 of size 3145728 from 0x300000 flash address,                                                                                         time: 16.817 milliseconds

NOTICE:  Reset status: Power-On Reset

NOTICE:  BL2: v2.5(release):bsp33.0.hf1-2.5-dirty

NOTICE:  BL2: Built : 13:13:01, Aug 11 2022

Warning: Instruction at BL33_ENTRYPOINT (0xffaa0000) is 0x3402c8b9, which is not                                                                                         a B or BL!

NOTICE:  BL2: Booting BL31

//------------------------------------------------------------------------------------------------------------------

Here we are unable to figure out where is the mistake which is breaking the booting process. 

2. Is that M7 project bin should have M7 CPU to enable code : is that Application bootloader code need to be included with my M7 project bin and that bin file need to browse from Application bootloader column in IVT tool before Flashing -- in this context Blod image file will it helps ?? or Application bootloader code need to be included with my M7 project bin file ??.

[Daniel-Aguirre]

Hi,

For Q1, maybe the following comments could bring more insight on the situation over the M7 being boot from the external NOR Flash:

We have run the same code you are working with using the below configurations on the IVT.

The only modifications were adding an infinite loop to the overall activity and a LED being toggled inside the infinite loop.

With this, we can verify that the code is running on the M7_0 core, and we also use PuTTY to show that no information is provided on UART0 regarding Linux booting up (SD card is inserted in the SD card slot).

For Q2, we are not understanding the general idea you are trying to provide. If you are planning on using M7_0 core to run the Application Bootloader, the above IVT should be useful.

If you plan to use both M7_0 and A53_x, you need to implement and load on the "Application Bootloader" a bootloader that configures everything for A53 and then both M7 and A53 can jump to their specific applications. Below a diagram of what we explained above:

Please, let us know.

[viswa_kondapall]

Hi Daniel,

Q1: In our case IVT tool with NOR flash option is formatting SD card also. Now we changed to QSPI and other few parameters added then not erasing. 

Q2 : CAN2CAN Sample application bin as goldvip-gateway.bin : We replaced M7 project bin file as goldvip-gateway.bin but RDB2 is not booted.

This question is asked to make M7 flashing process to make easy. 

Our details process is below : CAN2CAN sample bin file: interface as QSPI flashing with application bootloader RAM pointer : 0x3400 0000 

but still M7 and A53 is not booting but goldvip-gateway.bin is working fine but it is not booting for us.

We are following below configuration in IVT tool to flash CAN2CAN project Bin file. Please correct us if any wrong is there.

CAn2CAN example project.bin with SW4.7 OFF : M7 and A53 is not booting. SW4.7 - ON A53 is only booting and M7 is unresponsive.

1# CAN2CAN Sample project :

2 # Boot Configuration :

3#  Interface Selection :

4# HSE :

5# Automatic Align :

6#  Application Bootloader :  1.  CAN2CAN example project BIN file path given at Application bootloader – Here is my doubt are we are doing right or wrong??.

1. RAM start pointer is SRAM address : 0x3400 0000.
2. RAM entry pointer is also same  : 0x3400 0000.

8# : DCD and blob images are exported: Project

[Daniel-Aguirre]

Thanks for your feedback.

Good to know you got the SD card erasing solved out.

Regarding the second point, we still have some doubts regarding it, below will be some comments:

We understand that you are using (as a selected example) the CAN2CAN provided project and that you are flashing it with the configured IVT as shown on the different steps/images. This is not working.

We have flashed to NOR Flash using the "RAM Entry pointer" as the intc_vector address and has worked for us. We might recommend doing this change to see if this have a different behavior than the one you are having right now.

Still, have you tried a simpler application (like the one provided on the SW Enablement guide) and has it worked for you? We recommend going for a simple application to understand the flashing flow that the S32G platform has. For the steps that you have provided, those are (for our understanding) specific for what GoldVIP SW has to offer. If you are planning on just flashing a new application, we recommend following the enablement guide.

We want to understand the root cause at this moment, given there are many variables on your set-up. Help us using a simple application and let us know what outcome you get.

Also, are you trying to create a multicore project? This means, having the M7 running an application and the A53 run linux? If so, the IVT has to have in the "application bootloader" section a bootloader binary that fetches both applications (the one for the M7 and the one for the A53). Just by flashing the IVT with an M7 example does not boot-up the A53. If this is the case, we recommend looking into the AN13750 available on the S32G2 product page (link: S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors) which details the creation of a multicore boot with a provided bootloader from NXP.

Please, let us know.

[Daniel-Aguirre]

Hi,

There is an AN available on the S32G2 product page (link: S32G2 Safe and Secure Vehicle Network Processor | NXP Semiconductors) which shows how to flash binaries to the available NOR Flash on the RDB2 board [Flashing Binaries to S32G-VNP-RDB2 Board, Rev. 1, 05/2021].

Have you tried to flash a simple application to the board before? Was it successful? If not, we can recommend starting with the "Siul2_Dio_ToggleLed_S32G274A_M7" provided example on the RTD.

Also, when using the QSPI interface for booting, the following note provided on the RM must be taken into account [Page 1172, S32G2 Reference Manual, Rev. 6, 11/2022]:

"BootROM sets a timeout of 500ms when downloading the application image. User must ensure that the maximum image
size can be downloaded within this time. The image size would depend on the configuration used."

For which a reconfiguration parameters file for the QSPI must be used. There are some available once S32DS and an RTD is installed under the following address (may vary depending on the S32DS/RTD version):

"C:\nxp\S32DS.3.4\eclipse\mcu_data\processors\S32G274A_Rev2\PlatformSDK_S32XX_2022_03\quadspi\default_boot_images"

Also, there is a "Software Enablement Guide" available on the GOLDBOX product page (link: GoldBox for Vehicle Networking Development Platform | NXP Semiconductors) that demonstrates the creation of the IVT with a guided example. The modifications on the linker file are to be done if an the uSDHC boot is to be used, if you plan on using the external NOR Flash, you should be able to dismiss these changes but will need to use the reconfiguration parameters file mentioned above.

Please, let us know.

[viswa_kondapall]

Hi Daneil,

Thank you for the reply. few documents i went through. We took CAN2CAN example project instead of LEDs project. IVT demo video by NXP we followed in flashing bin file. CM7 project .bin file we are giving in the application bootloader in the IVT, RAM start pointer as 0x34000000  and RAM entry pointer also given same (may be this is the error) after blob and automatic alignment there value is getting corrected here the i have to cross check. Software enablement guide is given RAM entry pointer should be INTC_Pointer address. 

In the IVT tool we are choosing:

1. boot configuration M7_0

2. Interface selection is NOR FLASH (after successfully writing it is erasing SD CARD also).

3. Rest of the details are same. 

Once POR no messages (May be M7_0 is booted but A53 console(UART0) not giving any message).

here is got a doubt shall we enable UART_1 as a Debug port for M7.

Q1: cant we able to write NOR flash without erasing SD Card data which is A53. to boot ?

Q2 : Cant we use CM7_project_code.bin as goldvip-gateway.bin ?? if its then shall we replace goldvip-gateway.bin with CM7_project_code.bin.

Q3: is it possible to changes ?? if so do we need to do any project config changes ?? 

Q4 : is there any other way to flash M7 code : 1. Laughter bauch or 2 S32 Debug Probe.

Please guide us.

Thank you.

Viswa.

[Daniel-Aguirre]

Hi,

Below will be some comments regarding your questions:

Q1: cant we able to write NOR flash without erasing SD Card data which is A53. to boot ?

A1 >> We have written to the NOR Flash with the SD card inserted in the board and we retain the information on the SD card. We are not seeing the behavior you are describing.

Q2 : Cant we use CM7_project_code.bin as goldvip-gateway.bin ?? if its then shall we replace goldvip-gateway.bin with CM7_project_code.bin.

A2 >> Could you elaborate more on this? We are not understanding the reason on why the need of renaming the binary itself. The binary should be able to have any name it requires, if you are only looking for flashing it to the NOR Flash itself.

Q3: is it possible to changes ?? if so do we need to do any project config changes ?? 

A3 >> We understand you are referring to the GoldVIP provided binaries. Under the "documentation" section there is the "GoldVIP-Developer-Guide.pdf" which describes the possible modifications into the provided projects.

Q4 : is there any other way to flash M7 code : 1. Laughter bauch or 2 S32 Debug Probe.

A4 >> Both tools you are mentioning are supported by the S32G platform. Aside from this, the S32 Flash Tool is another way provided by NXP.

As for the IVT, we recommend following the "Software Enablement Guide" mentioned before, which provides an example that can work for NOR Flash if configured correctly (changing the boot device to QuadSPI, it does not require the parameters file if the linker file was modified as specified in the guide) and does not use UART interfaces, but the provided RGB Led on the RDB2 board.

Please, let us know.

[viswa_kondapall]

Hi Daniel,

After multiple chat/post, didnt get clear picture about How to flash M7 binaries , what is the procedure and what are dependent files required and how to flash. 

We have GoldVIP 1.5.0/1.6.0 Binaries and CAN2CAN example project compiled binaries. Apart from this what are the files are need to flash?? with the procedure.

Q2: boot-loader file in goldvip binaries, shall we use "boot-loader == Bootloader.bin" and shall we use it to flash through IVT from Application Bootloader category and shall we use it to create bootloader DCD with boot-loader file from the SDcard.

Q3: In Goldvip binaries 2 more files sja1110_switch.bin and sja1110_uc.bin -- how to flash these files -- these are binaries for SJA1110 ethernet switch.

Please help in this.

[Daniel-Aguirre]

Hi,

We apologize if our answers are not as expected.

The flashing of the M7 core, running the application ONLY on the M7_0 core and NOT using other cores, is as shown before, where we show the IVT creation that we use to run the application on the external NOR Flash embedded on the RDB2. This, if using the provided NXP examples. If not, some other considerations should be taken regarding the linker file.

For Q2, could you help us elaborate more on regards of "and shall we use it to create bootloader DCD with boot-loader file from the SDcard"? The intended way on how to flash/run the GoldVIP binaries is shown under the User Manual provided when downloading the package itself. If you are planning on modifying the provided files, a "Developer's Guide" is also provided upon download that shows the modifications that can be done to the GoldVIP itself.

For Q3, this is explained either on the Linux BSP 33.0 User Manual for S32G2 Platforms, under chapter "7.7 Setting up SJA1110 switch over SPI" or on the "Ethernet Enablement Guide" provided under the GOLDBOX product page (link: GoldBox for Vehicle Networking Development Platform | NXP Semiconductors)

Please, let us know.

[viswa_kondapall]

Hi Daniel,

Thank you for reply. Few points i didnt understood. 

//---------

The flashing of the M7 core, running the application ONLY on the M7_0 core and NOT using other cores, is as shown before, where we show the IVT creation that we use to run the application on the external NOR Flash embedded on the RDB2. This, if using the provided NXP examples. If not, some other considerations should be taken regarding the linker file.

//---------

1. We followed all the steps and referred all documents, we at a stage that A53 is booting but not M7. We just replaced goldvip-gateway.bin with NXP example project CAN2CAN, compiled and flashed it through u-boot with name changed to "goldvip-gateway.bin" run write_gateway_app with this command.

Now our project bin is not booting but NXP prebuilt with Goldvip-gateway.bin M7 is booting. Why and how it is booting , what is the change ?? NXP only has to reveal the answers   

i want to bring all into same page, i am attaching My example project in zip file and Bin/elf filesavailable in Debug_Ram folder. 

Either correct me if we are doing wrong or suggest me what has to do to Boot M7. 

[Daniel-Aguirre]

Hi,

Thanks for your feedback.

The GoldVIP package was designed to work as a whole, meaning that the linker files and all the cores that participate in the application were programmed to work one with the others. If you want to modify the given files on the GoldVIP, a Developer's Guide is provided for this reason.

Just changing the name of a different project and uploading it without taking care of the linker and functionality of the other cores may yield undefined behavior.

Returning to the M7_0 and not A53+M7 nor GoldVIP, the "Software Enablement Guide" mentioned some time ago provides the steps to generate an M7_0 project which turns ON a LED on the RDB2 board. We recommend this guide for this specific topic you are looking. It is available from the GOLDBOX product page (link: GoldBox for Vehicle Networking Development Platform | NXP Semiconductors)

It is shown how to boot it up from the SD card, but you can change the interface to NOR Flash, just that change will make it work from NOR Flash, nothing else (just take care of the alignments).

There is also an example provided on the HOWTO's list thread that we will provide below. The example provided in there shows from how to create the application all the way on how to debug the application, but you can follow the IVT example we provided in order to flash it into the NOR Flash, just remember looking into the *.map file for the "intc_vector" regarding the entry pointer.

S32DS - list of HOWTOs - NXP Community

Again, both projects that are explained in there will NOT use A53 core, hence no console output will be seen. Just the LED being turned ON.

Still, we recommend the SW Enablement Guide rather than the HOWTO's for this specific topic, given it shows the creation of the IVT.

Again, you will not need the A53 nor Linux nor the GoldVIP package in order to boot the M7 core from external NOR Flash. We may even recommend not looking into the GoldVIP package if what you are trying is to boot the M7 core, use the "Software Enablement Guide" for this purpose.

Please, let us know.

[viswa_kondapall]

Hi Daniel,

1. LED example file is working after changing Linker file(as per LED document) with SD card with cygwin -- steps as per the LED document.  -- Here A53 is not booting.

2. LED raw bin file name changed as goldvip-gateway.bin  and writing from Uboot. After reset, A53 is booting but M7 is not booting which is same file.

What is this mystery ??? Why what is the change ???  This point NXP has to reveal / reply the answer. 

There is something which is not opening it. 

We need RDB2 board should work as Goldvip binaries we need the same with example projects. 

[gmocanu]

Hello,

I'll refer only to the GoldVIP-related issue presented here. Only renaming your project isn't enough for it to be booted on the Cortex-M7_0 core.

First of all, you should ensure that the SRAM region used by your application is not overlapping with the ones used by the other applications running in the system (or actually any other shareable resource). I would suggest changing your linker script to make use of the same address space as the GoldVIP RT Gateway application does - check the <GoldVIP_for_S32G2_installer_path>/configuration/can-gw/workspace/goldvip-gateway/source/boards/S32G_RDB_V2/board-gnu.ldscript linker script for the exact memory ranges.

Secondly, you must also make sure that the bootloader application can properly load and start your application. For that, you must re-configure/re-build the bootloader application to match your specific setup - the "Reset handler address" and "Load image at address (RAM)" configuration options might require an update.

Please let us know whether this helps.

Best regards,
George

[viswa_kondapall]

Hi George,

Thank you for your reply.

Once we changed linker file to below then M7 is booting:

MEMORY
{
int_itcm : ORIGIN = 0x00000000, LENGTH = 0x00000000 /* 0KB - Not Supported */
int_dtcm : ORIGIN = 0x20000000, LENGTH = 0x00010000 /* 64K */
int_sram_shareable : ORIGIN = 0x22C00000, LENGTH = 0x00004000 /* 16KB */
int_sram : ORIGIN = 0x34000000, LENGTH = 0x00400000 /* 4MB */
int_sram_stack_c0 : ORIGIN = 0x34200000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c1 : ORIGIN = 0x34202000, LENGTH = 0x00002000 /* 8KB */
int_sram_stack_c2 : ORIGIN = 0x34204000, LENGTH = 0x00002000 /* 8KB */
int_sram_no_cacheable : ORIGIN = 0x34206000, LENGTH = 0x00100000 /* 1MB, needs to include int_results */
ram_rsvd2 : ORIGIN = 0x34800000, LENGTH = 0 /* End of SRAM */

LLCE_CAN_SHAREDMEMORY : ORIGIN = 0x43800000 LENGTH = 0x3C800
LLCE_LIN_SHAREDMEMORY : ORIGIN = 0x4383C800 LENGTH = 0xa0
LLCE_BOOT_END : ORIGIN = 0x4383C8A0 LENGTH = 0x50
LLCE_MEAS_SHAREDMEMORY : ORIGIN = 0x4384FFDF LENGTH = 0x20
}

But GoldVIP-gateway has different has different - could you please help me in understanding.

MEMORY
{
ipcf_shm (RW) : org = 0x34100000, len = 0x100000
exctable_C0 (RX) : org = 0x34500000, len = 0x400
exctable_C1 (RX) : org = 0x34500400, len = 0x400
exctable_C2 (RX) : org = 0x34500800, len = 0x400
reset (RX) : org = 0x34500C00, len = 0x100
rom (RX) : org = 0x34500D00, len = 0x0df300
ram (RWX): org = 0x345E0000, len = 0x21f000
endram (RX) : org = 0x347ff000, len = 0x100
LLCE_CAN_SHAREDMEMORY : org = 0x43800000, len = 0x3D000
LLCE_LIN_SHAREDMEMORY : org = 0x4383C800, len = 0xa0
LLCE_BOOT_END : org = 0x4383C8A0, len = 0x50
}

[Daniel-Aguirre]

Hi,

As said by George: "you should ensure that the SRAM region used by your application is not overlapping with the ones used by the other applications running in the system (or actually any other shareable resource)".

Could be that the linker file you followed does not overlap with the other applications, hence you can see it working.

Please, let us know.

[ofer-bahar-guardknox]

Hi Daniel 

I'm having a similar issue : Simple M7 single core application works, flashed OK to the NOR flash, but does not being boot !

Steps I do

1. Building and checking a M7 application from the examples Siul2_Port_ToggleLed_S32G274A_M7

2. Did all steps from: HOWTO: Use IVT Tool To Create A Blob Image S32G274... - NXP Community

3. for the DCD i imported the one from the project, only exported it as binary

4. for the application bootloader RAM entry pointer I put the intc_vector

5. for the application bootloader RAM start pointer I put the int_sram from the linker file

6. I tried either with or without QuadSpi parameters file e.g. mx25_sim200ddr.bin, or mx25_sim133sdr.bin

7. export a blob, looks OK

8. flash the target, it completed OK

9. set the switched to boot from NOR flash, make power off, power on

Result : Nothing!, the LED should have been blinking 

what am I missing ?

thanks