Hi all,
We don't have any configuration switch in our hardware to burn the eFUSE configurations. For this reason we want to burn it via software and found OCOTP peripheral module and we are checking if it is right for our hardware since it is a one time operation and cannot be taken back.
Our confusion comes from the register addresses defined in the software;
#define OCOTP_GP6_127_96 0x384U
#define OCOTP_GP6_159_128 0x388U
#define OCOTP_GP6_127_96_SHADOW_REGISTER 97U
#define OCOTP_GP6_159_128_SHADOW_REGISTER 98U
#define CRC0_EFUSE_ADD 0x2DCU
#define CRC0_SHADOW_REGISTER 55U
What does OCOTP_GP6_127_96 mean in the register? We want to program the field BOOT_CFG1[31:0] - ADDR=0x234 field. Which shadow register value corresponds to this?
Thank you
Solved! Go to Solution.
Hi,
Below will be some comments on regards of your questions:
Q1 > What does OCOTP_GP6_127_96 mean in the register?
[NXP]: This is related to the mapping of that specific FUSE address. We can see that under the S32G2_Fuse_Map_Table.xlsx file embedded under the S32G2 RM the following address is provided for GP6[127:96]:
For which 0x384 is the address of GP6[127:96].
Q2 > We want to program the field BOOT_CFG1[31:0] - ADDR=0x234 field. Which shadow register value corresponds to this?
[NXP]: Seeing the file mentioned before, the address should be the one you are mentioning (0x234). For the shadow register, we understand that the calculation is as follows:
Shadow Register = (Address - 0x200) / 4;
We can verify this by using the registers you are showing:
Don't know if this helps.
Also, as you are mentioning this is a one-time operation and cannot be taken back, for which care should be taken with the configuration being chosen. We can recommend contacting your local NXP FAE/DFAE/representative for confirmation on these settings.
Please, let us know.
Hi,
Below will be some comments on regards of your questions:
Q1 > What does OCOTP_GP6_127_96 mean in the register?
[NXP]: This is related to the mapping of that specific FUSE address. We can see that under the S32G2_Fuse_Map_Table.xlsx file embedded under the S32G2 RM the following address is provided for GP6[127:96]:
For which 0x384 is the address of GP6[127:96].
Q2 > We want to program the field BOOT_CFG1[31:0] - ADDR=0x234 field. Which shadow register value corresponds to this?
[NXP]: Seeing the file mentioned before, the address should be the one you are mentioning (0x234). For the shadow register, we understand that the calculation is as follows:
Shadow Register = (Address - 0x200) / 4;
We can verify this by using the registers you are showing:
Don't know if this helps.
Also, as you are mentioning this is a one-time operation and cannot be taken back, for which care should be taken with the configuration being chosen. We can recommend contacting your local NXP FAE/DFAE/representative for confirmation on these settings.
Please, let us know.
Hi @Daniel-Aguirre ,
thank you for your quick response. It made me understand the underlying logic.
How do we map from 0x234 to 0x384? That is, the way going from BOOT_CFG1 to GP6[127:96] ?
Thanks
Hi,
Thanks for your feedback. We don't seem to understand this last request. Can you help us elaborate more on the following comment:
"How do we map from 0x234 to 0x384? That is, the way going from BOOT_CFG1 to GP6[127:96] ?"
Why are you trying to map BOOT_CF1 to GP6?
Please, let us know.