Hello All,
I am working on enable ethernet communication in our project. But Eth_43_PFE driver is not getting initialised. After debugging identified as if condition is not getting passed and partitionStat is not setting to True. Please guide me to resolve this issue.
/**
* brief Checks the access to the controller
* details This function is intended to check whether the controller can be accessed or not by reading clock partition enable bit (partition 2 for PFE),
the field PCS. The capability to access the controller will be similar to the return value.
* return Controller accessibility
* retval TRUE Controller is accessible
* retval FALSE Controller access failed
*/
boolean Eth_PFE_LLD_CheckAccessToController(void)
{
boolean partitionStat = FALSE;
if(MC_ME_PRTN_STAT_PCS == (hal_read32(MC_ME_BASE + MC_ME_PRTN2_STAT) & MC_ME_PRTN_STAT_PCS))
{
partitionStat = TRUE;
}
return partitionStat;
}
.
Hello Daniel,
Thanks for your reply.
Yes, we are using NXP board. Currently we are using the RTD version 3.0.3. Firware version is PFE-FW_S32G_RTM_1.3.0.
Hello Daniel,
The issue that I mentioned earlier has been resolved. The issue was related to MCU Clock Configuration. Now we are facing other error while trying to read the pfe version from pfe_platform_init. You can see the images. While trying to read the pfe version , bus fault exception is triggering from the Os. we are not using the core partition and we don't have a memory mapping in the linker script at the moment, as we are in the beginning stage of the project. Is the issue is related to missing of proper memory mapping? you can see the screen shot from lauterbach and tresos configuration below.
Request your support.
Hi,
Thanks for the information. We will provide this additional information to our internal team to confirm if the memory mapping inside the linker file is needed for this situation.
Please, let us know.
Hi,
We have received the following information from our internal team:
"I would suggest to check following steps before loading PFE driver
And then please suggest to follow PFE MCAL driver integration manual to complete PFE driver integration. It should be careful about PFE memory allocation which is descripted in Chapter 8."
Please, let us know.
Hello,
Thanks for the detail updates. Unfortunately, our issues are not resolved. Still Eth_43_PFE is not initialized.
We are facing issues in MCU PFE Partition clock. Only PRTN_STAT0 Clock is active PRTN_STAT1 and PRTN_STAT2 are Inactive. Below the register value of PRTN2_STAT is zero. How can we set this to 1?
We have done MCU configuration. Any Port configurations are required to enable these clocks?
Please see the tresos configuration below.
Hi,
It is said on the S32G2 Reference Manual [Chapter 28.12.7, Page 1079, S32G2 Reference Manual, Rev. 6, 11/2022] that to enable the partition clocks, you should use the corresponding "MC_ME_PRTNn_PCONF[PCE]", is this being done inside the application? Image below:
Please, let us know.
Hello,
MC_ME_PRTNn_PCONF[PCE] for Partition 0 is enabling from CMM script. We don't have application SWC component to enable the partition clock at the moment.
We tried to enable the Partition 2 clock (MC_ME_PRTN2_PCONF) from the CMM as similar to Partition 0. But still the clock is not activated.
Also we couldn't see the registers for enabling core 0 for partition 2 as similar for Partition 0. Could you please tell, can we enable the partition2 clock from the cmm ? If yes what is missing in our cmm?
Hi,
We have received the following comment from our internal team:
"can you provide the MCU configuration file(Mcu.xdm)?"
Given that this channel is a public one, we may recommend opening a ticket under the NXP online services, for a private channel.
Please, let us know.
Hello,
We can provide the Mcu.xdm. Could you please share the link of NXP online services.
Hi,
The NXP online service should be available under the "SUPPORT" tab inside the NXP home page (link: NXP® Semiconductors Official Site | NXP Semiconductors), as shown on the following image:
In there, you should be able to create a ticket and you should be able to provide this same community post link under the description, for future reference.
Please, let us know.
Hi,
Can you help us providing the following information?
Please, let us know.