Query related to S32G2 PFE MAC0 and PFE-MAC2 from Cortex -M7

[Ganesh_Pawar]

Hi All , 

Kindly checkout the image attached and the query is related to it.

Queries :

1.This query is related to S32G274A PFE-MAC usage from Cortex-M7 .
2.As per the image attached the PFEMAC0 and PFE-MAC2 MDC&MDIO lines are shared to 2 different PHY and are configured to use both the interfaces.
    PFE-MAC0 --> ETH PHY2.
    PFE-MAC2 --> ETH PHY3.
    Both share the same MDC and MDIO lines.
    Is this possible to change the Pin configuration and access both the Interface(PFEMAC0 & PFEMAC2) during Run-time using S32 Design Studio IDE.

Kindly consider this issue as critical and provide your inputs on this.

Thanks and Regards

Ganesh Pawar

[Daniel-Aguirre]

Hi,

We do apologize for the delay. We might not understand fully the description, we apologize for any misunderstanding from our side.

The following is told from the internal team:

"Any MDIO controller on S32G (which could be considered as part of the corresponding MAC controller, such as GMAC MDIO controller can be seen as part of GMAC controller) could only work in MDIO master mode. In addition, to enable and use the certain MDIO controller on S32G, the corresponding MAC controller should be enabled prior to the MDIO controller. For example, you should configure and enable the GMAC before using the GMAC MDIO controller to communicate with the partner (i.e. PHY)."

As for changing the pin configuration on run-time, should be feasible, but all related modules should be disabled prior to changing pin configuration, since not doing it might provide undefined behavior.

Please, let us know.