Because my design is different from the RDB Design, I use PL_01, PL_02 for the MDC/MDIO control pins of PFE1.
DTS configuration
/* PL01 */
#define PL01_MSCR_S32G (177)
#define PL01_PFE1_MDC_CFG (SIUL2_MSCR_S32_G1_MUX_ID_4 | \
MDC_PIN_CFG)
/* PL02 */
#define PL02_MSCR_S32G (178)
#define PL02_PFE1_MDIO_CFG (SIUL2_MSCR_S32_G1_MUX_ID_4 | \
MDIO_PIN_CFG)
#define PL02_PFE1_MDIO_IN (SIUL2_MSCR_S32_G1_MUX_ID_3)
2)uboot pfe1_mdio configuration in DTS
pinctrl0_pfe1_mdio: pinctrl0_pfe1_mdio {
fsl,pins = <PL01_MSCR_S32G PL01_PFE1_MDC_CFG
PL02_MSCR_S32G PL02_PFE1_MDIO_CFG
>;
};
When my Uboot is started, an error message is generated.
The problem has been solved Thank you very much
Hi Longfei,
I can't verify this here but could you find out what the configuration of the GMAC MDIO pins are if the GMAC is still in the device tree?