Integrate IPCF and VR5510 Watchdog functionality

[honeybee1881]

Hi Team,

I am currently working with the RDB3 board and utilizing the example projects provided in S32 Design Studio.

My goal is to integrate IPCF functionality along with the external watchdog feature—specifically, to send a reset signal from the A core to the M core using IPCF as the communication medium. As I am relatively new to this topic, I started by integrating the IPCF_Example_S32G399A_M7_0 project into the Wdg_VR5510_HLD_Example_S32G399A_M7. I have adapted the source code and configurations accordingly to successfully build the project.

I generated the .bin file for the M core and compiled the IPCF source code from the ipc-shm examples for the A core.

For executing the examples, I am using the S32G boot image from NXP with BSP version 40. The M core .bin file is being transferred via U-Boot as described in the IPCF_Example_S32G399A_M7_0 instructions.

Issue: Upon booting the OS, the boot process appears to get stuck after displaying the following log:

a core log stopping at 
  0.632631] 401cc000.serial: ttyLF1 at MMIO 0x401cc000 (irq = 47, base_baud = 7812500) is a FSL_LINFLEX
[    0.642399] 402bc000.serial: ttyLF2 at MMIO 0x402bc000 (irq = 68, base_baud = 7812500) is a FSL_LINFLEX
[    0.653367] s32cc_fccu 4030c000.fccu: FCCU status is 0 (normal)
[    0.661337] sja1110-sw@1 enforce active low on chipselect handle

Could help me to check where its going wrong?

S32G3 S32G-VNP-RDB3 IPCF VR5510 

[chenyin_h]

Hello, @honeybee1881 

Thanks for your post.

For such kind of issues, it is highly related with the resource conflict issues between M and A part, like memory address, clock, pin, etc.

I suggest firstly checking the resources used on M core side first and then to check if they are also used/initialized on A core part.

BR

Chenyin