S32K144 CAN extended format frames' SRR bit = 1 or 0?

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

S32K144 CAN extended format frames' SRR bit = 1 or 0?

942 Views
guangwenli
Contributor I

About S32K144 CAN extended format frames'  SRR bit setting 1 or 0?

1.
Describe
  In the S32K1xx Series Reference Manual:

SRR — Substitute Remote Request
Fixed recessive bit, used only in extended format. It must be set to one by the user for
transmission (Tx Buffers) and will be stored with the value received on the CAN bus for
Rx receiving buffers. It can be received as either recessive or dominant. If FlexCAN
receives this bit as dominant, then it is interpreted as an arbitration loss.
1 = Recessive value is compulsory for transmission in extended format frames
0 = Dominant is not a valid value for transmission in extended format frames

2.
In SDK 3.0:
status_t FLEXCAN_SetTxMsgBuff()

{

……

       /* Set the ID according the format structure */
        if (cs->msgIdType == FLEXCAN_MSG_ID_EXT)
        {
            /* ID [28-0] */
            *flexcan_mb_id &= ~(CAN_ID_STD_MASK | CAN_ID_EXT_MASK);
            *flexcan_mb_id |= (msgId & (CAN_ID_STD_MASK | CAN_ID_EXT_MASK));

            /* Set IDE */
            flexcan_mb_config |= CAN_CS_IDE_MASK;

            /* Clear SRR bit */
            flexcan_mb_config &= ~CAN_CS_SRR_MASK;
        }

……

}

so, SRR bit = 1 or = 0 ?

Labels (1)
0 Kudos
1 Reply

890 Views
PetrS
NXP TechSupport
NXP TechSupport

Hi,

the SRR should be recessive for extended ID so I think the last line should be as below

/* Set SRR bit */

flexcan_mb_config |=  CAN_CS_SRR_MASK;

BR, Petr

0 Kudos