S32K144 ADC+DMA+sdk

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S32K144 ADC+DMA+sdk

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Contributor I

S32K144 ADC+DMA+sdk

需求:

ADC1:12路通道采集数据,搬运到DMA指定目的内存中。

问题:

1、触发DMA中断时,每个通道转换完触发DMA中断吗?

2、PDB只能一次触发4个ADC通道?

3、基于我的例程,可以将单一通道进行DMA触发,但是只能触发一次,我目前没有定位到问题是什么吗。

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NXP TechSupport
NXP TechSupport

Hi,

see attached main.c I modified in your ADC_DMA_test-master project. Now all 12 conversions are done and DMA properly transfer it from ADC to buffer variable.

I made few changes:

- fix DMA setup to properly read ADC result registers and transfer value to buffer variable

- ADC channels 0-11 must be used according to PDB pretriggers selected

- PDB1 chn delay0 must be properly set. I used ch0 delay0 = 0 and ch1 delay0 = delayValue/2.

delayValue was calculated to set PBD modulo 1sec.

Timing can be adjusted based on ADC conversion timing, which is discussed in the chapter 42.5.4.5 of the RM.

BR, Petr

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NXP TechSupport
NXP TechSupport

Hi,

could you please describe all in english? This is questions I got from translator, answers are in blue

1. When the DMA interrupt is triggered, does each channel trigger the DMA interrupt after the conversion?

DMA request is generated upon each ADC conversion

2. Can PDB only trigger 4 ADC channels at a time?

There are 2 PDBs, each PDB has 2 channels that have 8 pretriggers for the ADC. So each PDB module can trigger up to 16 ADC channels on single ADC module. And each PDB has single trigger input. Thus, it is easy to configure PDBs to be triggered together and perform 2 parallel conversions. 

3, based on my routine, you can DMA trigger a single channel, but only once, I am not currently positioned to ask what the problem is.

What is desired functionality of your example? Seems you do a lot of modification of the demo project and it it is not so clear from first view.

BR, Petr

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Contributor I

thank you for your reply.I have done a lot of experiments in recent days.

My application needs are: ADC1 uses 12 channels. Use the PDB1 trigger and store the results of the ADC acquisition via DMA.
At present, I trigger the 8 channels of ADC1 through channel0 of PDB1, and want to send the remaining 4 channels through the channel1 channel of PDB1.

pastedImage_1.png

In the routine code, I added:

ADC_DRV_ConfigChan(ADC_INSTANCE, 1UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 2UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 3UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 4UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 5UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 6UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 7UL, &adConv1_ChnConfig0);

ADC_DRV_ConfigChan(ADC_INSTANCE, 8UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 11UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 14UL, &adConv1_ChnConfig0);
ADC_DRV_ConfigChan(ADC_INSTANCE, 15UL, &adConv1_ChnConfig0);

PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig1);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig2);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig3);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig4);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig5);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig6);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 0UL, &pdly1_AdcTrigInitConfig7);

PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 1UL, &pdly1_AdcTrigInitConfig8);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 1UL, &pdly1_AdcTrigInitConfig9);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 1UL, &pdly1_AdcTrigInitConfig10);
PDB_DRV_ConfigAdcPreTrigger(PDB_INSTANCE, 1UL, &pdly1_AdcTrigInitConfig11);

PDB_DRV_SetAdcPreTriggerDelayValue(PDB_INSTANCE, 0UL, 0UL,(uint32_t) delayValue);

PDB_DRV_SetAdcPreTriggerDelayValue(PDB_INSTANCE, 1UL, 0UL,(uint32_t) (60000));

In my program,The first trigger time of channel 1 has to be after the last measurement of PDB channel 0.(I don't know how much time should be set at a specific time) .When entering the DMA interrupt, only the 8 channels triggered by PDB1 channel0 have data.I didn't locate the reason:

pastedImage_2.png

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NXP TechSupport
NXP TechSupport

Hi,

see attached main.c I modified in your ADC_DMA_test-master project. Now all 12 conversions are done and DMA properly transfer it from ADC to buffer variable.

I made few changes:

- fix DMA setup to properly read ADC result registers and transfer value to buffer variable

- ADC channels 0-11 must be used according to PDB pretriggers selected

- PDB1 chn delay0 must be properly set. I used ch0 delay0 = 0 and ch1 delay0 = delayValue/2.

delayValue was calculated to set PBD modulo 1sec.

Timing can be adjusted based on ADC conversion timing, which is discussed in the chapter 42.5.4.5 of the RM.

BR, Petr

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