S32 Design Studio for Power Architecture have some bug.

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S32 Design Studio for Power Architecture have some bug.

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Contributor I

Hello. 

Currently, I use S32 design studio to development MPC5746B.

But, I have some trouble.

To explain my current development environment(Processor Expert).

1. Add Can_pal (Ch0 ~ Ch2)

2. Can0 ~ Can1 : CAN (High speed)

3. Can2 : CAN FD

4. CAN Ch0 ~ 2 enable Tx, Rx, Bus off Interrupt.

5. CAN0 - Rx : mb 0 ~ 31,  Tx : mb 32 ~ 64 (Tx, Rx bus load between 5% and 15%)

6. CAN1 - Rx : mb 0 ~ 31,  Tx : mb 32 ~ 64 (Tx, Rx bus load between 1% and 3%)

7. CAN2 - Rx : mb 0 ~ 31,  Tx : mb 32 ~ 64 (Tx, Rx bus load between 80% and 90%)

When i used Can0 & Can2 , I can communicate without problems.(Include Tx, Rx, BusOff Interrupt)

BUT

When i used Can0 & Can1 & Can2, I have big problems!!

if CAN1 Line disconnected with CAN Interface, CAN1's & CAN0's Busoff interrupt occurs (Confirmed via T32.).

So CAN0 also cannot communicate.(CAN0 & CAN1 BusOff state)

I don't understood whether the state of CAN1 affects CAN0.

Why? ...

I have to solve this problem to keep my project schedule.

Thank you.

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NXP Employee
NXP Employee

Can you provide what version of SDK and compiler do you use ?!

The buss off appear on CAN1 or both CAN1 and CAN0 when you disconnect the CAN1 ?!

All the CAN interface are connected to the same CAN bus ?

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Contributor I

1. S32 Design Studio for Power Architecture v2.1

    S32_SDK_S32PA_RTM_3.0.0 (GNU C)

2. Yes, The bus off appear on CAN1 or both CAN1 and CAN0 when i disconnect the CAN1.

3. Each CAN channel uses a different bus.

 

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