LPSPI and EDMA setting issue for the callback function

[linton]

linton_0-1714296358072.png

I am setting the SPI with S32DS configure tool, when I select the Transfer type DMA, and the Callback function is the SPI sent complete or the EDMA sent complete callback??  if this is the SPI transfer complete callback, Where to set the EDMA transfer complete callback? anybody know are there any doc for reference? I am confuse, Thanks

[danielmartynek]

Hello @linton,

You did not specify the MCU and the SDK version.

But this is a callback of the LPSPI driver.

The documentation of the driver can be accessed from the IDE

Right-click on the driver -> Documentation.

danielmartynek_0-1714392890631.png

Regards,

Daniel

[linton]

Thanks Daniel,

I check the relay doc you recommend, but still not clear.

the MCU I use is the S32K148_LQFP100, the SDK version is s32sdk_s32k1xx_rtm_401

[danielmartynek]

There is no other documentation for the drivers.

What issues fo you have with the callback?

The LPSPI driver should call the callback at the end of the transfer.

There is this SPI event defined in callbacks.h

danielmartynek_0-1714474808729.png

Regards,

Daniel

[linton]

Hi daniel,

I set the LPSPI_0 as below photo show:

linton_0-1715138116821.png

and I use the scope to test the SOUT waveform as below show:

linton_1-1715138558010.png

I send 20 bytes data, so I can calculate the baudrate is about 4.2M(what I set is 4.8M), and I check the clock is right. as below show:

linton_2-1715138789486.png

what cause this problem? what I need is 4.8M , 4.75 to 4.85 is acceptable. but 4.2M is bad.

the second problem is I change the transfer type from DMA to interrupt. the configure as below:

linton_3-1715139000238.png

and I also use the scope to test the SOUT waveform as below show:

linton_4-1715139066278.png

as you can see it separate my 20bytes data to five part, 4 bytes per part. What cause this problem?

linton_5-1715139340156.png

[danielmartynek]

Hi @linton,

The baudrate is calculated by the RTD driver from the LPSPI clock.

RM, 51.3.1.12 Clock Configuration Register (CCR).

Can you try using a higher freq. LPSPI clock?

It is expected to see some overhead when the interrupt mode is used, the LPSPI module has 4-word TX FIFO.

Regards,

Daniel

[linton]

Hi Daniel,

now I use the higher freq(56MHZ) as below show:

linton_0-1715518549516.png

linton_2-1715518674233.png

but the performance did not looks better than before, it still separate to five parts(4bytes per part):

the blue is using interrupt, the green is using DMA.

linton_4-1715519043643.png

are there any solution to solve this issue when I use the interrupt mode??

my application is simple as below show:

linton_5-1715519332199.png

linton_6-1715519431994.pnglinton_7-1715519460606.png

[danielmartynek]

Hello @linton,

This is simply a limitation of the driver.

In general, the SDK drivers are big and cause some CPU overhead.

Enabling the cache could somewhat help but not much.

Regards,

Daniel

[linton]

so to avoid this issue, I should not use the SDK interface, directly control the TDR?? 

[danielmartynek · Accepted solution]

Yes, that would be much more effective.

If the TX FIFO is written before the LPSPI module shifts the last word, there will be no gap between the frames.

BR, Daniel