Hello, I am trying to configure flexio_uart_rx module to work with DMA, but I still need interrupts after every received byte (like in Interrupt mode). If I'm using DMA mode I getting only interrupt from DMA (when buffer fully filled). Interrupts from shifter didn't happens. In flexio_uart_driver.c I've copied following lines from interrupts to DMA cases:
But i still getting only UART_EVENT_RX_FULL interrupt.
Why do you need to use DMA if you also need interrupts for each received byte? The whole point if using DMA is to avoid these interrupts, thus reducing CPU load.
The driver will not generate events for each byte no matter what mode you use. It will only generate events when it fills the Rx buffer. If you want to get events after each byte, then you need to provide a buffer of size 1. Then the driver will send the event UART_EVENT_RX_FULL when a byte is received, and in the callback you can call FLEXIO_UART_DRV_SetRxBuffer to provide another buffer for the next byte (or reconfirm that the same buffer can be used again).
You can check the example driver_examples\communication\flexio_uart, it receives data byte by byte in the way described above.
Hello, thank you for answer.
I need something like "idle" interrupt, which will appear after some idle in receiving. For this I am using timer, which resets after every received byte and generates interrupt if no data were received in some period. Currently I am receiving bytes one by one, like you have suggested, but in this way I have some speed limits. I have commented out shifter deinit line in SDK IRQ handler to reduce processing time, but i still can't get highest speeds.
The idle timer is not implemented in the driver, you would have to implement it yourself. You can configure one unused flexio timer in 16-bit counter mode, with an initial TIMCMP value proportional to your desired timeout. Configure either the pin or the trigger for this timer to be the same as the UART Rx pin, and use the reset feature (TIMCFG[TIMRST]) to force the timer to reset when there is activity on the line (reset on pin/trigger rising or falling edge). When the timer counts to 0 it will issue the idle interrupt.
UPD: FLEXIO_IRQHandler happens, but when it checks which register was triggered this IRQ (FLEXIO_GetAllShifterStatus) - status already cleared. Is there any way to prevent DMA from clearing status reg? Or how I can know which shifter was triggered this IRQ if it's status already cleared?