When debugging Csec module with S32K118, example 1_Configure_part_and_Load_keys is used. FSTAT deposit writes 1 to clear FPVIOL and ACCERR. Why is it still 0 detected by debugger after writing.Did the register automatically clear to 0 after writing 1 in the initialization phase?
This code is to write 1 to the FSTAT register ACCERR and FPVIOL fields, but the actual ic5000 debugging found that it did not write in, as shown below.