I am evaluating the S32V234 in one of the safety-critical applications where I cannot go with the Linux/FreeRtos. So I am trying to bring up the bare board application first where I am having a hard time using the DDR configuration tool for the S32V234(lots of the compilation errors the tool generated .C and .H files). I have gone through multiple app notes and TRM(HOWTO: Use DDR Configuration and Validation Tool (S32DS for Vision)) but no luck. I am using the S32V234 SBC board with PE micro multilink debugger. The following are my requirements.
1. All the five cores, M4, A53_1, A53_2, A53_3, A53_4, and DDR working at maximum possible frequencies.
2. M4 core is the primary core and boots from the TCM/RAM which configures the system clocks, DDR and other system resources.
3. A53_x cores boot from the DDR(0x8000_0000 to 0x9000_0000 for code memory) with the virtual and physical address 1:1 aligned, I mean *(uint32_t*)0x80000000 on A53 cores should access to the first location of the DDR.
Is it possible for an FAE to share an example S32 studio project or guide on this?