"CorePowerDown" issue while flashing SW in S32K144

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"CorePowerDown" issue while flashing SW in S32K144

115 Views
Contributor II

Hello 

I am facing issue while flashing the S/W in S32K144 MCU. For flashing,  i am using lauterbach debugger. 

For your information , I observed that the MCU reset Pin always LOW.

The below error is observed from debug window.

pastedImage_1.png

I have used below Script. during System UP and i am facing above issue.

RESet
SYStem.RESet
SYStem.CPU S32K144
SYStem.CONFIG.DEBUGPORTTYPE SWD
IF COMBIPROBE()||UTRACE()
(
SYStem.CONFIG.CONNECTOR MIPI20T
)
SYStem.Option DUALPORT ON
SYStem.MemAccess DAP
SYStem.JtagClock CTCK 10MHz
Trace.DISable
SYStem.Up

Please let me know if anyone faced similar issue before?

5 Replies

29 Views
NXP Employee
NXP Employee

Hi, 

what's your board? Custom one or NXP EVB? 

Jiri

29 Views
Contributor II

Hi Jiri

its custom board. Please let me know if its required further information.

 

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29 Views
NXP Employee
NXP Employee

Hi, 

well, I never met such issue - especially with Lauterbach. It looks as a some HW issue - you probably did some basic checking - but can you confirm that MCU is properly powered, clock is working and So on? 

Jiri

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29 Views
Contributor II

Hi jiri

MCU is powered - VDD 5V

                              VDA 5V

Board current consumption- 0.010A (compare to operating mode consuming very less)

Additional Information 

Before connecting JTAG 

Clock - 0V

RST-    0V (connected with pull up resistor but still it shows 0V)

TDI -    5V

TDO -  5V

TMS-   5V

Vref -  5V

GND- 0V

Note:

RST pin is observed as 0V when there is no-connection as well as while connected with pull-up

 

After connecting JTAG

Clock - 0V

RST-    0V

TDI -    5V

TDO -  0V

TMS-   0V

Vref -  5V

GND- 0V

just to confirm

1) Is internal clock is used for fleshing the S/W in MCU?

2) Are there any chances the previous flashed SW corrupted the MCU?

Thanks, 

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29 Views
NXP Employee
NXP Employee

Hi, 

yes, it is possible that previously flashed program may lock up chip by disabling mass erase and secure chip on flash config address (0x400). In this case is JTAG physically cut off and the only way (as far as I know) is replace chip with new one. 

Jiri 

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