Hi
Yes it did work. I got a replay from the NXP community explaining the problem (as you did) and gave the following solution.
" So within the clock manager put right value for SOSC_CLK (40000000), also you should set SOSCDIV2_CLK to at least SOSC_CLK/2".
I tryied it and it works.
Thank you very much.
P.S. I was very impressed with the quick response and the exact support, well done ;-)