S32K144 SOSC frequency question

取消
显示结果 
显示  仅  | 搜索替代 
您的意思是: 
已解决

S32K144 SOSC frequency question

跳至解决方案
2,301 次查看
tom_zhaoxinping
Contributor II

I'm using S32KDS to config the clock of S32K144. 

I tried to set SOSC frequency to 4 MHz when SOSC range is selected as medium. However an error exists (as is shown in the picture). It says 'Output frequency must in the range: 8 MHz ~ 40 MHz (See constraint 1)' (translated from chinese). So, can 4 MHz oscillator be used as SOSC, or why shouldn't it be used? 

无标题.png

Also, when I set 'External reference select' to 'External reference clock', the error disappears. But I didn't find any related limits in reference manual (S32K1XXRM Rev. 14, 09/2021) or datasheet (S32K1xx Data Sheet Rev. 14, 08/2021). 

无标题2.png

 

S32DS version: 3.5.2 230226 (Update 2)

Package version(not sure whether this package is used): S32K1xx development package 1.0.0

无标题2.png

0 项奖励
回复
1 解答
2,263 次查看
tom_zhaoxinping
Contributor II

This seems to be a bug in S32K1XX SDK RTM 4.0.1. In S32DS 3.4 + S32K1XX SDK RTM 4.0.3, this error doesn't exist. Attention, S32K1XX SDK RTM 4.0.3 can NOT be used in S32DS 3.5. So S32DS 3.4 is recommanded to use S32DS 3.4 instead. 

Thanks to Shen for help. 

在原帖中查看解决方案

0 项奖励
回复
4 回复数
2,264 次查看
tom_zhaoxinping
Contributor II

This seems to be a bug in S32K1XX SDK RTM 4.0.1. In S32DS 3.4 + S32K1XX SDK RTM 4.0.3, this error doesn't exist. Attention, S32K1XX SDK RTM 4.0.3 can NOT be used in S32DS 3.5. So S32DS 3.4 is recommanded to use S32DS 3.4 instead. 

Thanks to Shen for help. 

0 项奖励
回复
2,254 次查看
tom_zhaoxinping
Contributor II
As the error disappears when I set 'External reference select' to 'External reference clock', I guess 'SOSC Range' doesn't matter when using 'External reference clock'.
0 项奖励
回复
2,287 次查看
Robin_Shen
NXP TechSupport
NXP TechSupport

Hi zhaoxinping,

Do you need PLL
If PLL is used, then oscillator needs to be in high range only, SCG_SOSCCFG[RANGE] on 11 as used in reference clock.
When SCG_SOSCCFG[RANGE]=11 , frequency of selected crystal oscillator should be 8 MHz to 40 MHz.

28.1.3 Oscillator and SPLL guidelines.png


Best Regards,
Robin
-------------------------------------------------------------------------------
Note:
- If this post answers your question, please click the "Mark Correct" button. Thank you!

- We are following threads for 7 weeks after the last post, later replies are ignored
Please open a new thread and refer to the closed one, if you have a related question at a later point in time.
-------------------------------------------------------------------------------

0 项奖励
回复
2,282 次查看
tom_zhaoxinping
Contributor II
Hi Shen.
Thanks for your reply.
Actually, I used a 8 MHz OSC for PLL. But to prevent my colleagues from making a mistake in the future, I want to know the reason and write a comment in my design. Also, if this is a bug in S32DS, maybe I can report to NXP to fix it. (But as I have known S32DS for a few years, I'm not sure if this is a bug.)
0 项奖励
回复