Dear support,
S32DS3.4 S32G Config Tool Clocks shows the clocks for SerDes 0 and SerDes 1 in Clock Diagram as a fixed value 100Mhz for SerDes 0 and 125MHz for SerDes 1 - see attached snapshot ...
Hoever accoring to S32G Reference Manual the SERDES_REF_CLK is derived from PERIPH_PLL_PHI0_CLK Clock is the same for SERDES 0 and SERDES 1.
Unfortunately the tool does not allow SERDES 0 clock to be set to 125MHz to be the smae as SERDE 1 which is the case for intended customer configuration.
Would it be possible to recheck the root course for this and how we could fix this ?
Best Regards,
Viktor
