The ADC measurement is always relative – relative to your voltage reference. The most of the applications don't allow to use accurate and expensive voltage reference. In that case, VDDA is used as the reference for ADC measurement. Since the operational VSUP range starts from 3.5V and accuracy of the voltage regulator is limited, we should use internal bandgap reference for compensating ADC voltage results. The bandgap voltage VBG has a narrow variation over temperature and external voltage supply. The example shows how to compensate ADC results by additional bandgap voltage measurement.

Here is the example code demonstrating erase/write/read of internal Flash module integrated into MagniV devices such as S12ZVM, S12ZVC, S12ZVL etc.   Find detailed description in the project's main.c file.   The example project was created in CodeWarrior IDE v10.6.4 and tested on TRK-S12ZVL board.

This example simulates ECC issue by cumulative write into the same EEPROM area without an erasing.   The EEPROM erase operation set all bits into log1. The EEPROM program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU EEPROM is protected by 22-Bit ECC Scheme. Every word (16bits) is protected by additional 6 bits with ECC checksum. The ECC values are not accessible for users. Every EEPROM reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signalling by MGSTAT bits.   The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)       The EEPROM patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0x100000-0x100001 is excluded from default EEPROM and is used as user EEPROM memory The size of EEPROM sectors is 2 bytes. The EEPROM_Program() function may program up to 4 words in single flash command.   Note: The EEPROM_Program() function was updated - erase verification is skipped     I hope it helps you. Radek

Work with pushbuttons and 7 segment display. Write assembly (ASM) and C programs for the HCS12, as well as to work with the pushbuttons and 7-segment display on the Dragon12-JR board.  The programs find the largest and smallest numbers from an arbitrary list of eight 8-bit unsigned numbers and displays them on the 7-segment display as outlined in the following.   1. Write a program to do the following, in both ASM and C. Do not use MINA, MINM, MAXA, and MAXM instructions.            a. Load an array of eight 8-bit unsigned numbers into RAM.            b. Find the largest of these numbers and store it.            c. Find the smallest of these numbers and store it.            d. Wait for the pushbuttons (S1 or S2) to be pressed.            e. The first time S1 is pressed, display the high nibble of the largest number; the second time S1 is pressed, display the low nibble of the largest number.                For example, if the largest number is 0x3F, the 7-segment display should show “3” the first time S1 is pressed and “F” the second time it is pressed.            f. Do the same for S2, except use the smallest number.  2. Explain why debouncing is used with switches. Optional: Implement software debouncing for switch used above.   Hints: These are unsigned numbers that your program will be searching through.  Make sure you are using the unsigned branch instructions in your ASM code. Your TA will be changing the numbers in your array to make sure it works for arbitrary 8-bit values. Please make sure the array is somewhere near the top of your program file. For interfacing to LEDs, 7 segment Displays, and pushbuttons see the schematic and manual of your development board. The type of the 7-segment LED on the Dragon12-JR board is common anode. All cathodes are driven individually by an output port and all anodes are internally connected together. The Dragon12-JR board uses port H to drive 7-segment cathodes. Skeleton files are provided to help you complete the asseignment. The 7-segment display communicates with the board via Port H whose address is $0260 (PTH).  Its data direction (input or output) is controlled by writing to Data Direction H register whose address is $0262 (DDRH). In order for PTH to be output (i.e. displaying something), you must set DDRH to $FF first (all bits high, all bits output).  The skeleton code does this for you this time. Almost every I/O port on the board works similarly to PTH; that is, you must set the direction of data on a corresponding data direction register before writing to or reading from it. The two pushbuttons (S1 and S2) are connected to PM6 and PM7. S1à PM6, S2à PM7 A subroutine that displays the low nibble of register A is included with the skeleton ASM code. Just store a value in register A and issue jsr seg7_out to display the low nibble of A. You are required to understand how it works and to write a similar routine for the C version of your code.   This document was generated from the following discussion: Professional Way to solve this HCS12 Dragon12-JR,Work with pushbottons and 7 segment display

The package contains of AN5327_SW ported to S12ZVML-MINIBRD hardware. Just minor changes are introduced, such as removing a button control, moving the LED light to another pin and using internal oscillator. This is just a working version, it is NOT an official release!!! AN5327_SW_CW11_MINIBRD.ZIP CodeWarrior 11.0 and AMMCLib 1.1.13 or higher is required to run this example. If you are not sure about the AMMCLib version, please download the general AN5327_SW from the www.nxp.com/automcdevkits first, install it and then unzip and use the example above.

Here are the two utilities which can be used to calculate the following:   - PLL filter component values on HCS12 devices such as MC9S12DP256   - PLL register values on S12(X) devices such as S12XE, S12XF, S12XS, S12P and S12HY.   Both utilities come with appropriate user manuals in PDF.

This simple SW example is a CodeWarrior project which demonstrates the usage of Security feature on a microcontroller. Find detailed description in the main.c file. It is also shown how to use backdoor access key to put MCU in unsecured state. The CW project is made for MC9S12ZVL device and the source code can be used on any other derivative with MagniV device family.

This example simulates ECC issue by cumulative write into the same Flash area without an erasing.   The Flash erase operation set all bits into log1. The Flash program operation may keep bit cells in log1 state or change it into log0 state, but not in opposite way.   The S12Z MCU Flash is protected by 39-Bit ECC Scheme. Every aligned 32bits is protected by additional 7 bits with ECC checksum. The ECC values are not accessible for users. Every Flash reading triggers also ECC check by internal logic. The single bit error in user data may be corrected by ECC checksum. The double bit error cannot be corrected.   The ECC protection is implemented also at flash controller commands and results are signaling by MGSTAT bits.     The first case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b10 due to fact that just 1 bit is different during write verification (correctable error)   The second case simulates Single-bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)   The third case simulates Double bit ECC error during reading. The MGSTAT bits after the second write are 0b11 due to fact that more than 1 bits are different during write verification (non-correctable error)     The flash patterns are selected for highlighted described behavior and they don't have any real meaning.   The cumulative write is not allowed for normal operation!!! The code from this example should be used only for design testing - not in production!!!   Please, see the prm file. Address range 0xFF0000-0xFF01FF is excluded from default ROM and is used as user flash memory The size of sectors is 512 bytes = 64 phrases.   Note: The PFLASH_Program() function was updated - erase verification is skipped     I hope it helps you. Radek

The example code shows how to invoke single or double bit RAM ECC error at S12Z devices.   Some basic overview about S12Z ECC codes may be found in thread AM/FLASH ECC Error handling .

Have you ever wondered what is the difference between the electric motors included in those two Development Kit with S12 MagniV?     MTRCKTSBNZVM128: 3-phase Sensorless BLDC Development Kit with S12 MagniV S12ZVM MTRCKTSPNZVM128: 3-phase Sensorless PMSM Development Kit with S12 MagniV MC9S12ZVML128 MCU   Well frankly writing none. They include the same motor model 45ZWN24-90       . So the motors are same from physics perspective, only the flux distribution in an air gap is different. It is sinusoidal for PMSM whereas it is trapezoidal for BLDC motor. The powerstage is same for both but what is different however is the control strategy. The Linix motor equipped with the DevKits is in fact somewhere between PMSM and BLDC, The flux is not sinusoidal nor trapezoidal.   Further information and motor parameters can be found at manufacturer product pages:                          http://www.linixmotor.com/3-3-Tool-Motor.html

 *******************************************************************************  * File              main.c  * Owner             LaMa-TIC-RPR  * Version           1.1  * Date              Jun/17/2016  * Classification    General Business Information  * Brief             S12Z Frequency Measurement at PT0 (IOC0_0) by TIM module  *                   in input capture mode  *******************************************************************************  * Detailed Description:  * The code measures frequency at PT0  * It demonstrates  * - It measures frequency at PT0 by means of TIM module IOC0_0.  * - The measurement is sensitive on rising edges so duty cycle has no affect  *   to the measurement  * - Constants:  *           BUSCLOCK  *           MAX_OVERFLOWS  *           TIMER_PRESCALLER  *      must be defined  * - MAX_OVERFLOWS determines minimum measurable frequency.  *   It is max. allowed number of overflows. When overflows counter reaches  *   this value it the flag FREQUENCY_TOO_LOW is set. The message  *   PERIOD BETWEEN TWO EDGES IS TO WIDE is then written to a variable "str"  *   This value gives time interval:  *     T = TIMER_PRESCALER * MAX_OVERFLOWS * 65536 / BUSCLOCK      *     For example:  *      - TIMER_PRESCALER = 1  *      - MAX_OVERFLOWS   = 1000  *      - BUSCLOCK        = 16,000,000Hz  *      T = 1 * 1000 * 65536 / 16,000,000 = 4,096s  => f=0,244140625Hz  * - TIMER_PRESCALER = { 1,2,4,8,16,32,64,128} - smaller values give more  *   precise values but it generates timer overflow more frequently  * - the physical representation of the measured frequency is stored in the  *   string "str"  *  * - The measurement precision is df which can be expressed as:  *  *    df = BUSCLK / ((n^2 + n) * PRESCALER); n = measured number of TCNT periods  *               *   For example: BUSCLK = 16MHz, n = 399, PRESCALER = 1  *     *     *             df = 16,000,000 / ((399^2 + 399) * 1) = 100.25Hz  *               *             so, count 399 means f=BUSCL/399=16,000,000/399 = 40,100.25Hz  *             so, count 400 means f=BUSCL/400=16,000,000/399 = 40,000.00Hz  *                   * So this method is not suitable for large frequencies as can be seen in  * following table (percentual error we can get is df/f):  * n   f[Hz]      df[Hz]                        n   f[Hz] df[Hz]  * 1   8000000   5333333,3           101 1553,0 30,1  * 2   2666666,6 1333333,3           102 1522,9 29,2  * 3   1333333,3  533333,3           103 1493,6 28,4  * 4    800000    266666,6             104 1465,2 27,6  * 5    533333,3  152380,9            105 1437,5 26,8  * 6    380952,3   95238,0             106 1410,6 26,1  * 7    285714,2   63492,0             107 1384,5 25,4  * 8    222222,2   44444,4             108 1359,1 24,7  * 9    177777,7   32323,2             109 1334,4 24,0  * 10   145454,5   24242,4            110 1310,4 23,4  * 11   121212,1   18648,0            111 1287,0 22,7  * 12   102564,1   14652,0            112 1264,2 22,1  * 13    87912,0   11721,6             113 1242,0 21,6  * 14    76190,4    9523,8             114 1220,4 21,0  * 15    66666,6    7843,1             115 1199,40,502  * 16    58823,5    6535,9             116 1178,8 19,9  * 17    52287,5    5503,9             117 1158,9 19,4  * 18    46783,6    4678,3             118 1139,4 18,9  * 19    42105,2    4010,0             119 1120,4 18,5  * 20    38095,2    3463,2             120 1101,9 18,0  * 21    34632,0    3011,4             121 1083,8 17,6  * 22    31620,5    2635,0             122 1066,2 17,1  * 23    28985,5    2318,8             123 1049,0 16,7  * 24    26666,6    2051,2             124 1032,2 16,3  * 25    24615,3    1823,3             125 1015,8 15,9  *  * - PCB setup:  *   - J35 is disconnected because measurement is done on PT0  *   - pulse generator is connected to the J35 pin 1. (PT0)  *    * - Reference to documentation: MC9S12ZVLMR1.pdf Rev. 1.02  * - Tested on TRK-S12ZVL  * - MCU MC9S12ZVL32 0N22G  * - OSCCLK = 4MHz  * - BUSCLK = 16MHz (set by PLL)  *  * The info about frequency and count is transmitted over the SCI0 Tx which is  * routed (MODRR) to PS1 pin  *  *******************************************************************************  Revision History:  Version Date          Author            Description of Changes  1.0     Jun/17/2016   LaMa-TIC-RPR      Initial version  ******************************************************************************/

Theory described in S12 FAMILY DEVICES COP RECOGNITION CONSIDERATIONS_v2.0.pdf

This example: 1. write unprotected P-Flash area 2. protect target P-Flash area 3. tries to write protected P-Flash area 4. call Protection Override command for temporary modify P-Flash protection 5. write into temporary unprotected P-Flash area 6. restore original P-Flash protection scheme The part of P-Flash memory used in this example for writing tests (0xFF8000..0xFF8FFFUL) is excluded from linker using. Please look at prm linker file for more details.   The flash_array constant with Protection Override Comparison Key is not directly referenced in the code, therefore we must enter the constant name into ENTRIES section in prm linker file for avoiding stripping it out as unused. Please look at P-Flash Protection Register (FPROT) chapter in the reference manual for more details about P-Flash protection. The key for Protection Override should be rather received from external source and used as PFLASH_Protection_Override() parameter. The correct Protection Override key is here hard-coded (err = PFLASH_Protection_Override(0xCAFE, 0xF...) for example code simplifying.   I hope it helps you. Radek

For debug purposes, it is possible to read and write the user data and the ECC value directly from/to the SRAM memory. For these debug accesses a register interface is available.   By the debug access and writing incorrect data + ECC values into the system memory,  the single and double bit ECC errors may be simulated for checking the software error handling.   The debug registers may be modified only in a special mode.   The tested address 0x3000 is excluded from linker use - see prm linker file.   I hope it helps you. Radek

You can find here two example codes for API timer. G240-API-CW51.ZIP contains example code for trimming API timer to 10kHz (API isn't factory trimmed). G240-API+STOP-CW51.ZIP contains example code for enter to stop mode and periodical wakeup by API interrupt

Here is the example code demonstrating usage of BATS module integrated in MagniV devices such as S12ZVM, S12ZVC, S12ZVL etc. Find detailed description in the projects main.c file. The example project was created in CodeWarrior IDE v10.6.4 and tested on TRK-S12ZVL board.

Dear reader,   There is extended information provided in the attached document. it contains detailed description "how-to", example design, detailed memory maps and code examples.   Also tested example projects created under CodeWarrior are attached.   I believe the document as well as SW examples will help you in the design and avoid mistakes we have met under our work in the S12(X) support team.   Yours sincerely,   Ladislav

Interrupt catcher you can use for debugging or directly in your software. Few notes: 1. You should replace lines for expected interrupt by your interrupts routines as in example of SCI0 interrupt routine. 2. All interrupt vectors are only 16bit addresses, therefore all your interrupt routines must be placed in non banked memory (for example by #pragma commands) 3. Interrupt number 0 presents POR reset vector, 1 is CM reset, 2 is COP reset, … , 119 is Spurious Interrupt. Interrupt number = (0xFE-Vector Address)/2. See Table Interrupt Vector Locations at RM. For Example: Interrupt number of SCI0 = (0xFE-D6)/2 = 0x14 = 20.

Attached zip file contains three Code Warrior project for MagniV devices (S12ZVM, S12ZVL and S12ZVC). Each of them demonstrates usage of High Voltage Input feature. Find detailed description in the header of main.c file of the CW project.

TIC example code, v.1.1 * The SW: * demonstrates FLASH programming as a part of application * uses adjusted routines from AN2720 * writes a few words into FLASH locations Pages FE and E0~EF may be used for data storage.   Other pages are used for program storage (see PRM file)      * tested on: HCS12X STARTER KIT * OSCCLK = 16MHz, BUSCLK = 8MHz * Reference to documentation: MC9S12XDP512V2 Rev.2.17 Original Attachment has been moved to: XDP512-FLASH-E_W-CW47.ZIP