Hi Frank,
The pulse accumulator is not available for the S12ZVM MCUs
So, the /64 clock in this sentence is not related to S12ZVM MCUs and I will report it.
However, if you still want to know the detailed information you can look at the RM rev 2.0 of the S12ZVC
to the section 11.4.4 Pulse Accumulator
https://www.nxp.com/docs/en/reference-manual/MC9S12ZVCRMV1.pdf
"The pulse accumulator (PACNT) is a 16-bit counter that can operate in two modes:
Event counter mode — Counting edges of selected polarity on the pulse accumulator input pin, PAI.
Gated time accumulation mode — Counting pulses from a divide-by-64 clock. The PAMOD bit selects the
mode of operation."
I hope it helps you.
Best Regards,
Diana
