mc9s12xep100 SPI2, no mosi

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mc9s12xep100 SPI2, no mosi

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angelo_d
Senior Contributor I

Dear all,

testing writing some bytes over SPI2, mcu is master, so SPI is master mode:

 

below mi initialization.

 

spi->cr1 = CR1_MSTR | CR1_SPE | CR1_SSOE | CR1_CPHA;

spi->cr2 = CR2_MODFEN;

 

// 12Mhz SPI clock
 spi->br = 0x00;

 

I see clearly by scope the clock generated on SCK by the mcu, but on MOSI i only see level to go fixed high.

 

Regards,

angelo

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RadekS
NXP Employee
NXP Employee

Hi Angelo,

By default, the MOSI2 signal is routed to PP5 pin. If PWM at channel5 is enabled, it has higher priority than SPI2 module.

The alternative routing option is PH5 pin where SPI2 have the highest priority.

What is your MODRR register value and at which pin you measure MOSI pin?

 

Could you please let me know which bytes you write into SPI2DR register (If you write 0xFF, the pins will stay at the high level)?

 

For transmitting data over SPI, you have to check SPTEF flag as first (read SPI2SR register). When SPTEF flag is set, you may write data into SPI2DR register. After that, you may wait for SPIF(SPTEF) flags in SPI2SR register as the end of transfer signals.

I hope it helps you.

Have a great day,
Radek

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924 次查看
angelo_d
Senior Contributor I

Hi Radek,

sorry to reply so late. Mainly MOSI was there, it was my measurement error by scope, getting a wrong moment in time.

I have SPI up and running, doing his job perfectly.

Many thanks for your support.

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RadekS
NXP Employee
NXP Employee

Hi Angelo,

By default, the MOSI2 signal is routed to PP5 pin. If PWM at channel5 is enabled, it has higher priority than SPI2 module.

The alternative routing option is PH5 pin where SPI2 have the highest priority.

What is your MODRR register value and at which pin you measure MOSI pin?

 

Could you please let me know which bytes you write into SPI2DR register (If you write 0xFF, the pins will stay at the high level)?

 

For transmitting data over SPI, you have to check SPTEF flag as first (read SPI2SR register). When SPTEF flag is set, you may write data into SPI2DR register. After that, you may wait for SPIF(SPTEF) flags in SPI2SR register as the end of transfer signals.

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

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