linera ram paging doubt

[FIDDO]

Hi ,

       I have doubt in linear ram addresing

 for ex:

 Im using MC9S12XEQ512  microcontroller where the ram memory is 32kb.

where 8kb is non-paged ram and remaining 24kb belongs to paged ram

 my placement in linker file goes like this

case 1:

.stack,

.shared data,

.default ram

                               into RAM ,RAM FD

if i declare a huge array which is shared between both non-paged and paged ram?  my microcontroller is getting reset!!!

so my doubt whether a large array can share RAM ( WHICH IS NON PAGED) and RAM_FD( paged) ??.....

2. Whether ram jumping should be linear i.e

RAM FF (NON PAGED) - > RAM FE( NON PAGED) -> RAM FD(PAGED) ->RAM FC(PAGED). ->RAM FB(PAGED)....

[kef]

Paged RAM requires more difficult addressing. You can't place default RAM and stack in paged memory segments, code won't work. You may put default RAM to paged memory only when using large memory model, but stack still has to be placed in nonbanked memory.

Use search to find how to use paged RAM.

[FIDDO]

thanks kef... one more doubt....

whether we can pre allocate all the global variables in paged ram...so that i can have enough space for stack and default ram??.... 

whether we can jump from one ram page to other non-linearly? in sense!!!  RAM FE(non paged) - > RAM F8(paged) - > RAM FA(paged)  like that!!!! 

im sorry if this question sounds stupid!!!

[kef]

• whether we can pre allocate all the global variables in paged ram...so that i can
• have enough space for stack and default ram??....

You need to use #pragma DATA_SEG

https://community.freescale.com/thread/109702

• whether we can jump from one ram page to other non-linearly? in sense!!! 
• RAM FE(non paged) - > RAM F8(paged) - > RAM FA(paged)  like that!!!!

I've problems understanding your request.

[FIDDO]

Hi kef,

 sorry for confusing you.

MICROCONTROLLER : MC9S12XEQ512VAGR

 1 . if i want to store array say, i.e unsigned int ru_var[200] in to  paged ram  ( RAM_FA)

  i did it in this way,

 # pragma DATA_SEG  _GPAGE_SEG RAM_ALLOC

static unsigned int ru_var[200]=0 ;

# pragma DATA_SEG DEFAULT

//..................REST OF THE VARIABLES.....

...

/**********************************************LINKER FILE *************************************************/

PLACEMENT

RAM_ALLOC 

                         INTO  RAM_FA  ( RAM_FA is allocated by default in the linker file)

/*********************************** ************************************************************************/

whereever extern is used, i did like this

#pragma push

# pragma DATA_SEG  _GPAGE_SEG RAM_ALLOC

 variable.................

#pragma pop

/***************************************************************************************************************/

i didn't get any problem  while compiling and linking.

While checking the map file ......Array is not allocated in the corresponding RAM page(RAM_FA). 

Is  there any problem in the way of implementation!!

please help me out kef!

[kef · Accepted solution]

Try with two underscopes, __GPAGE_SEG instead of _GPAGE_SEG

[FIDDO]

Thanks kef....