illegal address test on s12g128

[sreedharannandu]

Hi Everyone,

I have a requirement to test ILLEGAL ADDRESS reset on S12G128 micro.I do have TWR-S12G128 and PE micro MULTILINK UNIVERSAL with me.

Also using CW IDE for compiling,debugging.Is it possible to test illegal address using BDM?

Anybody successfully test illegal address reset using BDM ,please share? Any examples?

Regards,

Sree.

[RadekS]

We cannot directly debug resets by BDM. During reset is connection lost and you will get error debugger behavior (like PC jumping to "0000 BGND",…. . Only way is using some hardware peripherals like LEDs…

Since debugger still tries communicating with MCU (toggle with BKGD pin) MCU will be reset into special single chip mode or normal single chip mode randomly.

[HSW]

Hello Sree,

you could just write a CPU instruction into the RAM and execute it. For example "STAA $1800" -> "7A 18 00"

[sreedharannandu]

Hi  HSW ,

I was not able to see any interrupt happening with the PC decoding with instruction "7A 18 00" it executed like a NOP and proceeded to the next instruction.

Also i see the description in the Micro datasheet.

The BDM is not able to trigger illegal address resets

Do i need to set MODE to normal single chip NC explicitly in code?

If BDM cant trigger this and a free running without attaching BDM should trigger the reset correct?

5.4.3 Unimplemented and Reserved Address Ranges

The S12GMMC is capable of mapping up 240K of flash, up to 4K of EEPROM and up to 11K of RAM

into the global memory map. Smaller devices of the S12G-family do not utilize all of the available address

space. Address ranges which are not associated with one of the on-chip memories fall into two categories:

Unimplemented addresses and reserved addresses.
Unimplemented addresses are not mapped to any of the on-chip memories. The S12GMMC is aware that

accesses to these address location have no destination and triggers a system reset (illegal address reset)
whenever they are attempted by the CPU

. The BDM is not able to trigger illegal address resets

.

Reserved addresses are associated with a memory block on the device, even though the memory block does

not contain the resources to fill the address space. The S12GMMC is not aware that the associated memory

does not physically exist. It does not trigger an illegal address reset when accesses to reserved locations
are attempted.

[HSW]

Hello Sree,

I'm sorry, I gave you a wrong memory location. Address $1800 is not unimplemented on the S12G128.

Try this:

1. Set the PPAGE register to $02
2. Execute : "STAA $8000" -> "7A 80 00" from RAM

[sreedharannandu]

Hi HSW,

I tried calling the opcode 7A 80 00 from RAM ,after callling it  i see PC jumping to "0000 BGND" ,after which, the Micro seems to be running indefinitely and not able to stop it from BDM debugger IDE.

I have also put a breakpoint at startup function to see if reset hits the breakpoint.The micro doesnt event seem to reach the startup function.

Is it the desired execution of the microcontroller? or my understanding incorrect?

[HSW]

Hello Sree,

Is your reset vector set correctly? After you trigger the illegal address reset, you will most likely reset into normal single chip mode. If your reset vector is not set correctly you'll execute random code which might trigger a new illegal access reset.

[sreedharannandu]

can u plz review the soure code?

[kef]

You are using banked memory model. It means that by default code executes in page window, so by default you can't switch PPAGE, unless you jump to and execute from non-PPAGEd memory. You can do nonbanked routine for this and manipulate PPAGE from nonbanked routine. If you plan to exit back to banked code, you need to restore PPAGE register:

#pragma CODE_SEG __NEAR_SEG NON_BANKED

void foo(void)

{

char oldPPAGE;

   oldPPAGE = PPAGE;

   PPAGE = 2;                  //  \

   asm("  LDA  0x8000 "); //  - try reading illegal address

   PPAGE = oldPPAGE;

}

#pragma CODE_SEG DEFAULT

[RadekS]

Interrupts:

CPU registers (which are stored on stack) are CCRH (CPU12X only), CCR, B, A, X, Y and PC.

During entrance and leaving from interrupt routine aren’t stored/restored any page register (in default).

If you want store/restore page registers at begin/end of interrupt routine, you can use command #pragma TRAP_PROC SAVE_ALL_REGS prior every interrupt routine.

Command #pragma TRAP_PROC SAVE_ALL_REGS is described in compiler reference manual. Default path: "c:\Program Files\Freescale\CWS12v5.1\Help\PDF\Compiler_HC12.pdf"

See chapter Interrupt Functions (page 698).

There are also two another ways:

1. –Cp compiler option (for example: -CpPPAGE or –CpPPAGE=0x15 where 0x015 is page address)
2. Save and restore page register manually in your software (as Edward shows).

Disadvantage of command #pragma TRAP_PROC SAVE_ALL_REGS is that there is necessary some additional time for store and restore all page registers at begin/end of interrupt routine. From this point of view –Cp options presents little bit more effective way (you store/restore only page registers which are necessary). Third option (manual) presents most effective way. You store/restore only necessary page registers and only in interrupt routines where it is necessary.

In most of the cases these commands/options are not necessary.

Typically is paging handled by compiler automatically you don’t need take care about that. Problem occurs in case when customer code modifies some page register directly. In that case it is programmer responsibility to handle page register in interrupts.

[kef]

Radek,

it doesn't make sense to save/restore PPAGE register in interrupts. Banked routines are CALLed/RTCed from ISR's the same way like they are called from regular banked and nonbanked routines. What I pointed above is the need to 1) modify PPAGE from nonbanked routine and 2) the need to restore PPAGE when returning back from nonbanked routine to banked routine. It has nothing to do with ISR's.

[RadekS]

Kef,

You are right, my last reply was little bit out of topic. I wanted just mentioned typicall reason for illegal address reset - customer code modifies some of page registers directly (like PPAGE = 2;).

[kef]

For BDM all addresses are valid. Reset is generated only reading/writing illegal addresses using CPU code.

[sreedharannandu]

Can you please explain little more on this. Can you give an example code to debug?