Why does pgm not run without breakpoints

[AndersJ]

A simple asm program will only send a uart-char

if stopped at a breakpoint on every loop.

Will not run full speed.

Will not run standalone on a board.

Framework was generated by CW 3,1 wizard.

What have I done wrong?

Thanks,

Anders J

========================================================

            XDEF Entry
            ABSENTRY Entry

            INCLUDE 'mc9s12dt256.inc'

ROMStart    EQU  $4000  ; 

Baud9600  equ 52

; variable/data section
            ORG RAMStart
temp_byte   ds.b 1

; code section
            ORG ROMStart
Entry:     
       ldd   #Baud9600        ; 9600 baud
       std   SCI0BD

       ldaa  #mSCI0CR2_TE     ; Enable transmitter
       staa  SCI0CR2

       ldaa  #0
       staa  SCI0CR1
      
       clr   temp_byte

Loop:
       ldaa temp_byte            ; Send a 'B'
       staa SCI0DRL
       inc  temp_byte

       ldx  #60000
XmitLoop:               ; Waist time

       dex
       bne  XmitLoop

       BRA Loop

;**************************************************************
;*                 Interrupt Vectors                          *
;**************************************************************
  ORG $FFFE

  fdb     Entry      ; Reset

[AndersJ]

I added a brclr instruction after the loop label.

Loop:
       brclr  SCI0SR1,mSCI1SR1_TDRE,Loop

Now it works as intended, but I do not understand why.

The delay loop is a few 100 mS long, and should be sufficient. Or not?

Can anyone explain why the brclr makes this work?

Thanks for your help,

Anders

[Sten]

A quote from the S12SCIV2.PDF:

**

TDRE — Transmit Data Register Empty Flag
TDRE is set when the transmit shift register receives a byte from the SCI data register. When TDREis 1, the transmit data register (SCIDRH/L) is empty and can receive a new value to transmit.ClearTDRE by reading SCI status register 1 (SCISR1), with TDRE set and then writing to SCI data registerlow (SCIDRL).
 1 = Byte transferred to transmit shift register; transmit data register empty
 0 = No byte transferred to transmit shift register
**

This means that you have to read the TDRF before writing the next byte to the data-register

[Lundin]

The reason it works when you add breakpoints is likely because the debugger is reading the register and accidently clearing the flag, since those particular flags are cleared by read access.

It is usually a pain to debug SCI and SPI code because of it.

[Sten]

You must check the TDRE-bit before writing the next bit to the tranmsit-register. I did not calculate how long your 60000-loop takes, but it would be much easier to just test the TDRE-bit in the SR1-register.