Why LIN_stack_S12_4_6_3 can't works well in s12xs128 to send SYNCH(0x55) even the data has moved successfully from SCI Data Register to Transmit Shift Register

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Why LIN_stack_S12_4_6_3 can't works well in s12xs128 to send SYNCH(0x55) even the data has moved successfully from SCI Data Register to Transmit Shift Register

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angang_hao
Contributor II

My mcu is s12xs128, and transceiver is TJA1020.

All the LIN register  is initialized by LIN_stack in lin_lld_sci.c file. Additionally I have updated _PTM.Bits.PTM6 and _DDRM.Bits.DDRM6 to 1 enable transceiver.

Why is the data in Transmit Shift Register can't be transferred successfully? 

4 Replies

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello angang.hao@autoliv.com,

Could you please elaborate?

If I understand, the TDRE flag is cleared by the write to the Data Register and the flag is never set again or is the flag set but the data on the SCI bus are corrupted?

Do you monitor the bus between S12XS and TJA1020?

Do you see any SCI error flags?

Thanks,

BR, Daniel

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angang_hao
Contributor II

Hello Daniel,

Thanks again for your last support about Lin stack issue.

I am wondering whether you have some experience about "Event Trigger Frame" configuration. When I try to add a Event Trigger Frame in .ldf file,

the associated frames are not available to map to new added  Event Trigger Frame. So this process is only finished with failed.

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I would be very grateful if you could provide me with some information.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello angang.hao@autoliv.com,

Please see the answer here:

How to configure a Event trigger frame in .ldf file 

Regards,

Daniel

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angang_hao
Contributor II

Thank you very much, Daniel Martnek!

Rootcase has been found. And I think your second guess is correct. I configurated the PIT timer incorrectly case the head send request is called almost 1ms. This error makes the SYNS field(0x55) is filled but no chance to be transmitted.

Thanks for your time and in time response! :smileyhappy:

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