What is the effect of using low differential reference voltage for S12X ATD?

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What is the effect of using low differential reference voltage for S12X ATD?

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utwig
Contributor III

I am using the ATD module on the MC9S12XEP100. My plan is to use +5.2 V for the MCU supplies (VDDA, VDDX etc.) and stable +5.0 V for the VRH ATD high voltage reference pin. This is to make sure that even if my +5.2 V source fluctuates, VRH will stay lower than VDDA, which is required for correct ATD operation.

I am expecting to measure voltages in the range of 1.5-4.5 V. I was thinking about providing stable +1.0 V for VRL ATD low reference voltage pin to make better use of the ATD dynamic range and improve the quantization resolution. From the Table A-15 in MC9S12XEP100 manual I see that using +1.0 V as VRL and +5.0 V as VRH is okay when VDDA is +5.2 V.

However Section A.2.2.1 states:

"The accuracy is reduced if the differential reference voltage is less than 3.13V when using the ATD in the3.3V range or if the differential reference voltage is less than 4.5V when using the ATD in the 5V range."

Is there any data available on how much the accuracy is reduced when using <4.5 V differential reference voltage (4.0 V in my case)? I would like to know if that penalty is greater than the benefit of the increased quantization resolution.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

There are two specifications for the differential reference voltage, please see Table A-17, A-18 of the S12XEP RM.

Having the Vref in between can produce accuracy that is somewhere between these two specifications.

 

The degradation in accuracy for lower levels of Vref is driven by:

  • bit-worth voltage is decreasing and the same noise level creates more error in counts.
  • offset error is typically an absolute error, higher resolution again means more counts error

But for 4V Vref we may see a positive effect if the reference is stable enough.

 

Regards,

Daniel

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danielmartynek
NXP TechSupport
NXP TechSupport

Hi,

There are two specifications for the differential reference voltage, please see Table A-17, A-18 of the S12XEP RM.

Having the Vref in between can produce accuracy that is somewhere between these two specifications.

 

The degradation in accuracy for lower levels of Vref is driven by:

  • bit-worth voltage is decreasing and the same noise level creates more error in counts.
  • offset error is typically an absolute error, higher resolution again means more counts error

But for 4V Vref we may see a positive effect if the reference is stable enough.

 

Regards,

Daniel

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utwig
Contributor III

Thanks Daniel,

Good to know that there is not a specific discrete error source that appears below 4.5 V ref voltage. I think that I will do some tests to see can I get better performance with 5 V or 4 V differential reference voltage.

Best regards,

Timo

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