Two Interrupts at the same time

cancel
Showing results for 
Show  only  | Search instead for 
Did you mean: 

Two Interrupts at the same time

Jump to solution
911 Views
rayhall
Contributor V

What happens when you have two interrupts at the same time. I have this occuring, and the reply I got was that I was not clearing the interrupt flags correct. That does not tell me how my interrupts are causing me problem, or the way the S12XE deals with them. Does it process both at the same time. If not which one goes first.

 

Please do not mark this question as correct. I will decide what is correct by testing the answer given.

 

Ray.

Labels (1)
0 Kudos
1 Solution
725 Views
RadekS
NXP Employee
NXP Employee

Hi Ray,

Situation: Two simultaneous interrupts.

If we don’t use interrupt nesting, the interrupts will be serviced one by one.

When interrupts are enabled and occurs, the CPU finish current instruction and start to execute interrupt routine with the highest priority. When both interrupts have the same priority and this is the highest from all pending interrupts, the interrupt with higher vector address will be serviced first.

Resets share the highest exception-processing priority. After that are serviced non-maskable interrupts like XIRQ. After that are serviced I-bit maskable interrupts (according to IPL, in the case of the same priority according to rule - the higher the address, the higher the priority of the interrupt). Finally, the unimplemented page 2 opcode trap (TRAP), the SYS and the SWI instruction have the lowest priority. Also, since these are mutually exclusive instructions, they have no relative priority.

See chapter 7.3 Exception Priority in S12X CPU RM for more details:

http://www.nxp.com/files/microcontrollers/doc/ref_manual/S12XCPUV2.pdf

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

View solution in original post

0 Kudos
1 Reply
726 Views
RadekS
NXP Employee
NXP Employee

Hi Ray,

Situation: Two simultaneous interrupts.

If we don’t use interrupt nesting, the interrupts will be serviced one by one.

When interrupts are enabled and occurs, the CPU finish current instruction and start to execute interrupt routine with the highest priority. When both interrupts have the same priority and this is the highest from all pending interrupts, the interrupt with higher vector address will be serviced first.

Resets share the highest exception-processing priority. After that are serviced non-maskable interrupts like XIRQ. After that are serviced I-bit maskable interrupts (according to IPL, in the case of the same priority according to rule - the higher the address, the higher the priority of the interrupt). Finally, the unimplemented page 2 opcode trap (TRAP), the SYS and the SWI instruction have the lowest priority. Also, since these are mutually exclusive instructions, they have no relative priority.

See chapter 7.3 Exception Priority in S12X CPU RM for more details:

http://www.nxp.com/files/microcontrollers/doc/ref_manual/S12XCPUV2.pdf

I hope it helps you.

Have a great day,
Radek

-----------------------------------------------------------------------------------------------------------------------
Note: If this post answers your question, please click the Correct Answer button. Thank you!
-----------------------------------------------------------------------------------------------------------------------

0 Kudos