The response_error signal is abnormal by using LIN_2.X_STACK 4.5.9

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The response_error signal is abnormal by using LIN_2.X_STACK 4.5.9

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jeffcharles
Contributor III

Hi,

Now I am developing a project based on s12zvl32 by using LIN_2.X_STACK 4.5.9. As a slave, I add a response_error signal named HDHM_FL_ResponseError in the ldf editor according to the LIN Specification 2.1. 

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During the LIN communication conformance testing, the following problem occurred:

When the data byte 1 bit 4 of Rx message named HDHM_FL_21 is disturbed by CANoe, the slave give no response in the following messages. Does the software crashed? But when the data byte 4 and data byte 9(Checksum field) is disturbed, the slave can set the response_error signal and transmit it successfully. Please check the 3 pictures in the attachment.

So, how to solve the problem? Please give me support.

Jeff

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hungnguyenphi
NXP Employee
NXP Employee

Hi Jeff,

Daniel have found that the root cause is bit LOPCIF of register LPIF is turn on when disturb bit from 0 to 1 in data byte,

So please add :

#if ( defined(_MC9S12ZVL32_H) || defined(_MC9S12ZVL128_H) || \
defined(_MC9S12ZVMA_H) || defined(_MC9S12ZVMB_H))
#if (_SCI0_)

void LinPhy_ISR(void);
ISR(VectorNumber_Vlinphy0, LinPhy_ISR)
{
if(LP0IF_LPOCIF == 1)
{
LP0IF_LPOCIF = 1;
}
}
#endif /* END SCI0 */
#endif /* END ifdef _MC9S12ZVL32_H */

to file lin_isr.c 

and 

LP0IE_LPOCIE = 1;/* Turn on lin transmitter overcurrent interrupt */

right after LP0CR_LPE = 1; (line 252 in function lin_lld_sci_init() of file lin_lld_sci.c)

to resolve this issue.

This issue  fix will be fixed in next version 4.6.1

Best regards,

Hung.

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danielmartynek
NXP TechSupport
NXP TechSupport

Hello Jeff,

It is difficult to reproduce the issue.

Could you please elaborate on the description, attach the files or a test project?

Thanks,

Daniel

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jeffcharles
Contributor III

Hi Daniel,

I add the relevant files to the attachment. The test project is in the lin_test.zip, you can build it and download the .elf file to the MCU. Then you can use CANoe to simulate the master(BCM) to communicate with MCU. You can see the communication is successful in the trace window.

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Then I try to disturb the 'HDHM_FL_21' message by CAPL tool. When I press the button 'a' on the keyboard, the bit 4 of data byte 1 in 'HDHM_FL_21' message is inverted. The expected result is that the slave(HDHM_FL) set the response_error signal(HDHM_FL_ResponseError) and transmit it in next frame. But actually the slave stop transmitting the messages. 

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Besides, when I  disturb the bit 4 of data byte 4 in 'HDHM_FL_21' message, the performance of slave meets the expectations. You can see the HDHM_FL_ResponseError signal in the next 'HDHM_FL_21' message is set to '1'.

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You can follow these steps to reproduce the issue. I am waiting for your reply. Thanks!

Jeff

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hungnguyenphi
NXP Employee
NXP Employee

Hi Jeff,

I have run my project in TRK-S12ZVL (SCH-28001 REV E) with cannoe and it still run normally:

response_error.png

I will try your project and see what happened.

Best regards,

Hung. 

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jeffcharles
Contributor III

Hi Hung,

Have you tried it yet? And can you share your project with me?

Thanks.

Jeff

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hungnguyenphi
NXP Employee
NXP Employee

Hi Jeff,

I have investigated this issue. It seem an error regarding SCI bit error detect circuitry.

When disturb bit from 1 to 0 (BERRV = 0) in data byte, the board work normally.

But when disturb bit from 0 to 1 (BERRV = 1)  in data byte, the board cannot send any data in bus and when I try to send it by writing data in SCIDRL register, I receive bit error interrupt.

I am trying to contact with hardware team and will let you know result soon.

Best regards,

Hung.

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