Sleep mode in S12Z VCA192 controller.

[dhankarcdas]

Hi

I am trying to put the controller to sleep mode. In the data sheet it is given that U bit in CCR register has to be set and S bit has to cleared to go to sleep.

Currently we used "asm ANDCC #0x7F;" instruction which only clears the S bit.

ANDCC instruction access only lower 8 bit of CCR. But U bit is 15th bit od CCR.

How can we set the U bit in CCR?

The current sequence is

asm ANDCC #0x7F;     

    asm STOP;

[MJW]

Hello,

clearing the S-bit is sufficient to enable the execution of the "STOP" instruction.

Setting the U-bit would actually disable both "STOP" and "WAI" instructions (both are executed as "NOP" if U-bit is set).

HTH,

MJW

[dhankarcdas]

Thanks for the answer. But in reference manual MC9S12ZVC Family Reference Manual Rev. 1.3, page 52 it is given that

"The U-bit should be set and the S-bit (stop enable) should be cleared in the

CPU condition code register (CCR) to execute the STOP

instruction.Otherwise the STOP instruction is considered as a NOP."

This makes the confusion.

[MJW]

The correct description is in the S12ZCPU RM:

http://cache.nxp.com/files/microcontrollers/doc/ref_manual/S12ZCPU_RM_V1.pdf​

Look for the "STOP" instruction in "Instruction Glossary", for example.

("user state" refers to U-bit set, "supervisor state" to U-bit cleared).

So, this is an error in the S12ZVC RM.

I forwarded the issue to the S12ZVC RM owner to have this fixed in the next version.

Thanks for the notice.

Regards,

MJW